Method for forming a cylindrical capacitor having a central spin

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

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H01L 218242

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active

056630930

ABSTRACT:
A method for manufacturing a cylindrical stacked capacitor having a central spine for a DRAM using only one photo mask is provided. The invention uses sidewall spacers and selective etching techniques to form a low cost, simple to manufacture, high capacitance capacitor and DRAM cell. A substrate having source regions, drain regions and gate electrode structures is provided. An insulating layer with a contact opening is formed over the substrate surface. A first conductive layer and a first dielectric layer are formed over the insulating layer. The first dielectric layer and first conductive layer are etched forming a central spine over the contact opening. The etched first dielectric layer forms a dielectric cap over central spine. Dielectric spacers are formed on the sidewall of the central spine and the dielectric cap. The remaining portions of the first conductive layer are anisotropically etched using the dielectric spacers and the dielectric cap as a mask. Conductive spacers are formed on the sidewalls of the dielectric spacers. The dielectric cap and the dielectric spacers are selectively etched thereby forming a crown shaped storage node having a central spine. A capacitor dielectric layer and a top electrode are formed over the crown shaped storage node and the insulating layer forming a crown shaped capacitor.

REFERENCES:
patent: 5185282 (1993-02-01), Lee et al.
patent: 5436187 (1995-07-01), Tanigawa
patent: 5476806 (1995-12-01), Roh et al.
patent: 5491103 (1996-02-01), Ahn et al.
patent: 5543346 (1996-08-01), Keum et al.

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