Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent
1997-11-12
2000-04-04
Everhart, Caridad
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
257773, 257377, 257382, H01L 2945
Patent
active
060465050
ABSTRACT:
A method for forming a semiconductor device comprises the steps of forming first and second conductive lines having a space therebetween over a substrate, said first and second conductive lines each having a sidewall. A conductive spacer is formed over each sidewall, and an insulation layer is formed over the conductive spacers. First and second portions of the insulation is removed to form first and second openings therein, thereby exposing the spacers. The exposed portions of the spacers are removed. The conductive spacers form a conductive path between the first and second openings which would short any conductor formed in the first and second openings. To prevent shorting, a second protective layer is formed within the first and second openings which covers a portion of the spacers to remove the conductive path.
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S. Wolf "Silicon Processing for the VLSI Era vol. 2" Lattice Press, Calif. (1990) p. 199.
Everhart Caridad
Micro)n Technology, Inc.
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