Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2000-03-24
2002-05-07
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S530000, C438S132000
Reexamination Certificate
active
06384467
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the processing of semiconductor devices, and more specifically to etching through a passivation layer onto a semiconductor device.
BACKGROUND OF THE INVENTION
Modern semiconductor devices such as memory devices are known to use fuses in order to increase the yield obtained through modern semiconductor processing techniques. By providing fuses in semiconductor devices, such as memories, where redundancy is built in, it is possible to increase the yield by identifying defects in the device and replacing this defective circuitry with redundant circuitry by blowing fuses. In modern semiconductor technology this has been done with the use of both polysilicon (poly) fuses and metal fuses.
Metal fuses are formed in any one of a number of metal layers of a semiconductor device. For example, referring to
FIG. 1
, there are three metal interconnect layers indicated. Metal interconnects
118
,
120
, and
122
are illustrated to reside at these three layers. This device would be referred to as a triple layer metal device. In one type of fuse technology, a fuse is formed at the second layer of metal which can be then blown selectively by a laser operation during a testing and configuration stage. Note, that a metal fuse is not shown at the second metal layer in
FIG. 1
, however it would reside effectively at the same level as the metal interconnect line
120
, which is illustrated.
A known problem with the use of metal fuses is that the integrity of the blown fuse can be questionable. This integrity issue arises from the physical reaction of the metal fuse to the laser energy, and the material mechanics subsequent to this reaction. The laser energy melts the metal to a liquid state, and ideally, this melted metal flows away from the spot where the laser impacted the fuse. Often, the metal will not separate sufficiently to cause a complete electrical disconnect, or the melted metal may re-flow into the void generated by the laser, allowing an electrical connection to be reformed. This mechanism causes the repair to be ineffective and the specific device being repaired will not function as intended.
The use of poly silicon (poly) fuses has been utilized in order to overcome some of the issues associated with metal fuses. Specifically, poly vaporizes when exposed to laser light, thereby eliminating many of the problems associated with the use of metal fuses. The use of poly fuses has been successful where single and double layers of metal have been used. However, where a triple layer metal process has been used, as illustrated in
FIG. 1
, the use of poly fuses presents its own set of problems because it is at a lower layer in the semiconductor device process and flow. For example, as illustrated in
FIG. 1
, there can be four or more dielectric layers above the layer which the poly fuse
114
resides. As a result, the challenge is to etch down to expose the poly fuse
114
, without damaging any other portions of the device during the etch.
One problem that occurs during a deep etch process is illustrated in FIG.
1
and FIG.
2
. Following the formation of the three metal layers, a passivation layer
134
is formed atop the semiconductor device. Next, a combined fuse and die pad mask is used in order to expose the third, or top layer of metal. Specifically, the top layer of metal is generally used to form die pads
124
as well as the openings necessary to expose the poly fuse
114
. Because of the mismatch in depth between where the fuse resides with relationship to the surface and where the die pad
124
resides with relationship to the surface, a reliability problem exists. Note that by the time the etch process reaches the fuse
114
, so that it can be accessed by a laser, the photoresist mask
136
has been etched away such that the passivation layer
134
has been etched below metal interconnect structure
122
(
FIG. 2
) which it is meant to protect. Therefore, there is no passivation over this structure which in turn causes reliability issues. Therefore, a method allowing for a high reliability etch to polysilicon fuses without causes reliability issues incurred as a result of etching the fuses and bond pads at the same time would be desirable.
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Cumpian Fred
Mitchell Joel
Pfeffer Gary
Brock II Paul E
Lee Eddie
Motorola Inc.
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