Fishing – trapping – and vermin destroying
Patent
1987-11-17
1990-07-03
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437203, 437 52, H01L 21225
Patent
active
049391046
ABSTRACT:
The present invention is described in conjunction with the fabrication of a dRAM cell which an important application of the present invention. The described cell provides a one-transistor/one-capacitor dRAM cell structure and array in which the cell transistor is formed on the sidewalls of a substrate trench containing the cell capacitor; the word and bit lines cross over this trench. This stacking of the transistor on top of the capacitor yields a cell with minimal area on the substrate and solves a problem of dense packing of cells.
One capacitor plate and the transistor channel and source region are formed in the bulk sidewall of the trench and the transistor gate and the other plate of the capacitor are both formed in polysilicon in the trench but separated from each other by an oxide layer inside the trench. The signal charge is stored on the polysilicon capacitor plate by an electrical connection of the source region with the polysilicon capacitor plate, which is provided by the described embodiment of the invention.
Another embodiment of the present invention is an interconnection between a surface conductor and the surface of the substrate. This embodiment uses a conductive plug formed between the conductor and the substrate to form an interconnection using a minimum of surface area of the substrate.
REFERENCES:
patent: 4261765 (1981-04-01), Komatsu et al.
patent: 4483726 (1984-11-01), Isaac et al.
patent: 4669176 (1987-06-01), Kato
patent: 4738936 (1988-04-01), Rice
patent: 4797373 (1989-01-01), Malhi et al.
patent: 4824793 (1989-04-01), Richardson et al.
Bordelon Donald M.
Malhi Satwinder S.
Pollack Gordon P.
Richardson William F.
Anderson Rodney M.
Chaudhuri Olik
Sharp Melvin
Sorensen Douglas A.
Texas Instruments Incorporated
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