Method for filing substrate recesses using elevated temperature

Details Method for filing substrate recesses using elevated temperature Method for filing substrate recesses using elevated temperature

1994-08-16

1996-06-18

Lusignan, Michael

Coating processes

With post-treatment of coating or coating material

Heating or drying

427 97, 427123, 427124, 4273767, 4273977, 4274197, B05D 302

Patent

active

055275613

ABSTRACT:
To fill a hole or trench structure in an article, such as a semiconductor wafer, a layer is formed on the article. The layer extends over the structure so as to seal the mouth thereof. Then, the wafer and layer are subject to elevated pressure and elevated temperature such as to cause material of the layer to flow into the structure.

REFERENCES:
patent: 4758533 (1988-07-01), Magee et al.
patent: 4837051 (1989-06-01), Farb et al.
patent: 4920070 (1990-04-01), Mukai
patent: 5011793 (1991-04-01), Obinata
Extended Abstracts. vol. 88, No. 2, 9 Oct. 1988, Princeton, New Jersey US p. 361; G. C. Schwartz: "Planarization Processes For Multilevel Metallization".
IBM Technical Disclosure Bulletin. vol. 33, No. 1B, Jun. 1990, New York, US pp. 182-183; "High Aspect Ratio Fill By Multiple Depositions And Reflows".
Patent Abstracts of Japan. vol. 015, No. 514 (E-1150) 27 Dec. 1991 & JP-A-3 225 829 (Fujitsu Ltd.) 4 Oct. 1991 *abstract*.

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