Fishing – trapping – and vermin destroying
Patent
1991-08-12
1993-10-12
Maples, John S.
Fishing, trapping, and vermin destroying
437231, 437238, 437241, 437978, H01L 21441, H01L 21469
Patent
active
052525155
ABSTRACT:
A multiple layer metallurgy, spin-on-glass multilayer metallurgy structure and method for making such structure for a one micrometer or less feature size integrated circuit with substantially free field inversion on a semiconductor substrate having a pattern of device regions therein. A passivation layer is located over the surfaces of the patterns. A pattern of openings are made through the passivation layer to at least some of the device regions which include source/drain regions. A patterned first metallurgy layer is in contact with the pattern of openings. A first via dielectric layer is located over the pattern of first metallurgy layer. A silicon-rich barrier dielectric layer is located over the first layer. A cured spin-on-glass layer is over the barrier layer. A silicon oxide second via dielectric layer is over the spin-on-glass layer. A pattern of openings is in the second via layer, spin-on-glass layer, barrier layer and first via layer. A patterned second metallurgy layer is in contact with the pattern of openings to make electrical contact with the first metallurgy layer wherein the multilevel metallurgy integrated circuit with substantially free field inversion is completed.
REFERENCES:
patent: 4986878 (1991-01-01), Malazgirt et al.
patent: 5003062 (1991-03-01), Yen
Pramanik et al, "Field Inversion in CMOS Double Metal Circuits . . . ," VMIC Conference, Jun. 12 & 123, 1989, pp. 454-462.
Lin Jiunn-Jyi
Lin Kwang-Ming
Tsai Lih-Shyng
Ying Shu-Lan
Maples John S.
Saile George O.
Taiwan Semiconductor Manufacturing Company
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