Pulse or digital communications – Transceivers – Modems
Reexamination Certificate
1999-06-15
2001-11-20
Chin, Stephen (Department: 2734)
Pulse or digital communications
Transceivers
Modems
C375S231000, C375S354000, C370S503000, C708S305000
Reexamination Certificate
active
06320901
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to systems for discrete multitone (DMT) transmission of data over a communication channel and more specifically to systems for training the time and frequency domain equalizer coefficients in DMT systems.
BACKGROUND OF THE INVENTION
Asymmetric digital subscriber line (ADSL) systems are used to implement broadcast digital TV, on-demand video, high-speed video-based internet access, and other forms of data transfers over existing twisted-pair telephone lines. Recently, the International Telecommunication Union published a draft recommendation for an ADSL system. See “Splitterless Asymmetric Digital Subscriber Line (ADSL) Transceivers,” International Telecommunication Union, ITU-T, G.992.2, March, 1999, which is incorporated herein by reference.
To provide reliable data transfers, ADSL uses DMT technology. Methods for encoding and decoding data using DMT technology in an ADSL system are well known. See, for example, J. Gibson, The Communications Handbook, pages 450-479, IEEE Press, 1997, which is incorporated herein by reference.
Generally, a DMT system uses a number of frequencies (or carriers) to transmit data over a communication channel. A block diagram of a DMT system is shown in FIG.
1
. The DMT system includes encoder
100
, communication channel
110
and decoder
120
. Encoder
100
receives serial data through line
102
. Encoder
100
encodes the data using a DMT system. Encoder
100
then provides the encoded data through line
104
to channel
110
. Typically, channel
110
includes a telephone line. After transmission through channel
110
, the encoded data is provided through line
112
to decoder
120
. Decoder
120
attempts to create a replica of the original serial data received by the encoder
100
through line
102
. To do so, decoder
120
attempts to minimize the effects of channel
110
on the encoded data. Decoder
120
also provides the complementary coding functionality to that of encoder
100
.
In many applications, a transceiver connects to each end of channel
110
. The transceiver includes both an encoder and a decoder. A portion of the frequency spectrum is allocated to each transceiver. This configuration allows data transmission in both directions.
Turning to
FIG. 2
, encoder
100
is described in further detail. The encoder
100
includes a serial-to-parallel converter
202
. Serial-to-parallel converter
202
receives the serial data through line
102
at a rate of B bits/second. Serial-to-parallel converter
202
groups the serial data into blocks of complex data having a length of N. In a typical implementation, N is
256
.
Channel characteristics will vary depending upon the specific implementation. For example, two different twisted-pair telephone connections will have, in all likelihood, different characteristics. Accordingly, encoder
100
determines the frequency characteristics of the channel and attempts to determine an optimal loading distribution. One method of determining a loading distribution is described in U.S. Pat. No. 5,479,447, “Method and Apparatus for Adaptive, Variable Bandwidth, High-Speed Data Transmission of a Multicarrier Signal over Digital Subscriber Lines,” P. Chow et al., Dec. 26, 1995, which is incorporated herein by reference. Serial-to-parallel converter
202
distributes the serial data according to the loading distribution. The resulting parallel data, X
0,k
, X
1,k
, . . . X
N−1,k
(where k denotes the block number), is provided over lines
204
to inverse fast Fourier transform (IFFT)
206
.
The IFFT
206
transforms the parallel data from the frequency domain into the time domain. As shown, IFFT
206
is 2N long. This transformation distributes the information contained in each element of the parallel data across the transformed data, X
0,k
, X
1,k
, . . . X
2N−1,k
.
The transformed data, X
0,k
, X
1,k
, . . . X
2N−1,k
, is provided over lines
208
to cyclic prefix adder
210
. Cyclic prefix adder
210
attaches a cyclic prefix, X
2N−1,k
, X
2N−2,k
, . . . X
2N−v,k
, to each block of data. The FFT sub-channel outputs do not interfere with one another if the cyclic prefix is longer in length than the impulse response of the channel. In practical applications, the impulse response of the channel (e.g., a twisted pair) is infinite in length. As will be described, further below, time-domain equalization (TEQ) is applied by a decoder to reduce the effects of the channel to a substantially finite duration. The cyclic prefix, X
2N−1,k
, X
2N−2,k
, . . . X
2N−v,k
, is chosen so that it exceeds this finite duration. Together the TEQ and the cyclic prefix operated to minimize the effect of the channel on the transmitted data.
Cyclic prefix adder
210
provides the prefixed and transformed data, X
2N−v,k
, . . . X
2N−2,k
, X
2N−1,k
, X
0,k
, X
1,k
, . . . X
2N−1,k
, through lines
212
to parallel-to-serial converter
214
. Parallel-to-serial converter
214
converts this data to a serial format and provides the resulting bit stream, x(t), through line
216
to digital-to-analog converter
218
. Digital-to-analog converter
218
provides the resulting analog signal through line
220
to low-pass filter
222
. Low-pass filter
222
removes high-frequency noise resulting from the conversion and provides the resulting signal through line
226
to isolation transformer
226
. The output of isolation transformer
226
connects to the communication channel
110
(shown in
FIG. 1
) through line
104
.
Turning to
FIG. 3
, a block diagram showing a model of communication channel
110
is described. Communication channel
110
is a digital subscriber line (DSL) or like medium suitable for exchanging data. As shown, communication channel
110
is modeled as a filter having an impulse response, h(t), with an additive noise component, n(t). According to this model, filter 302 convolves x(t) with h(t). In the frequency domain, h(t) corresponds to H(&ohgr;). The result is provided to adder
306
. Adder
306
also receives noise component, n(t), from channel noise generator
304
. Therefore, passing x(t) through communication channel
110
produces x(t)*h(t)+n(t), where “*” denotes the operation of convolution. The resulting signal, y(t), is provided to decoder
120
(shown in
FIG. 1
) through line
112
.
Turning to
FIG. 4
, decoder
120
is shown in further detail. The received signal, y(t), is passed though transformer
410
, which acts to isolate any D.C. components. The received signal is then provided through line
412
to low-pass filter
414
. Low-pass filter
414
removes high-frequency noise. The signal is then provided through line
416
to analog-to-digital converter
418
where it is converted to a digital signal. The received signal is then provided through line
420
to time-domain equalizer
422
. Time-domain equalizer
412
includes a finite-impulse-response (FIR) filter that limits the effective memory of channel
110
. The signal is then passed over line
424
to serial-to-parallel converter
426
. Serial-to-parallel converter passes the resulting parallel data, y
2N−v,k
, . . . y
2N−2,k
, y
2N−1,k
, y
0,k
, y
1,k
, . . . y
2N−1,k
, over lines
428
to cyclic prefix stripper
430
. The resulting signal, y
0,k
, y
1,k
, y
2N−1,k
, is provided over lines
432
to fast Fourier transform (FFT)
434
. The signal provided to FFT
144
is
2
N wide and is transformed from a time domain representation to a frequency domain representation. Since the amplitude vs. frequency and the delay vs. frequency responses of the channel are not necessarily constant across the frequency band, the received signal, Y
0,k
, Y
1,k
, . . . Y
N−1,k
, will differ from the encoded signal X
0,k
, X
1,k
, . . . X
N−1,k
. Frequency domain equalizer (FEQ)
438
provides a simple form of compensation for these differences. The FEQ
438
individually adjusts the attenuation and delay of each of the carriers.
The FEQ
438
passes the resulting signals, Z
0,k
, Z
1,k
,
Arad Oren
Efroni Boaz
Gal Avi
Chin Stephen
Ha Dac V.
National Semiconductor Corporation
Stallman & Pollock LLP
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