Pulse or digital communications – Repeaters – Testing
Patent
1997-07-08
1998-11-10
Ghebretinsae, Temesghen
Pulse or digital communications
Repeaters
Testing
H04B 169
Patent
active
058355286
ABSTRACT:
A method for setting the state of a clock-driven pseudo-noise sequence generator ("PNSG") having N stages, after the clock has been inhibited for a predetermined number K of clock cycles, to the state S.sub.2 (D) the PNSG would have been had the clock not been inhibited, based on the state S.sub.1 (D) the PNSG is in at the time inhibition of the clock is commenced. The method involves performing the following steps. First, a previously determined value, a(D)=the remainder of D.sup.Kq /f(D), is stored, wherein D is the delay transform operator, q=2.sup.N -2, and f(D)=c.sub.1 D.sup.N +c.sub.2 D.sup.N-1 + . . . +c.sub.N D+1. The product S.sub.2 (D)=a(D)S.sub.1 (D) is formed, wherein S.sub.1 (D)=s.sub.11 D.sup.N-1 +s.sub.12 D.sup.N-2 + . . . +s.sub.1N D.sup.0. If the degree of S.sub.2 (D) does not exceed N-1, the state bit values for S.sub.2 (D) are inferred from the product. However, if the degree of S.sub.2 (D) exceeds N-1, the product S.sub.2 (D) is first reduced by f(D), and then the state bit values for S.sub.2 (D) are inferred from the product.
REFERENCES:
patent: 4776012 (1988-10-01), Zscheile, Jr. et al.
patent: 4875021 (1989-10-01), Sonetaka
patent: 5228054 (1993-07-01), Rueth et al.
Donaldson Richard L.
Ghebretinsae Temesghen
Kesterson James C.
Moore J. Dennis
Texas Instruments Incorporated
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