Method for fabrication of semiconductor elements

Details Method for fabrication of semiconductor elements Method for fabrication of semiconductor elements

1994-03-01

1995-06-27

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 41, 437 69, 437 72, 437913, 148DIG117, H01L 218234

Patent

active

054279712

ABSTRACT:
This invention relates to a method for fabrication of MOS transistors having LDD(Lightly Doped Drain) structure which comprises the steps of forming a gate insulation film on a semiconductor substrate of a first conduction type, forming a conduction layer for forming a gate pole on the gate insulation film, forming an oxidation prevention layer on the conduction layer, carrying out selective etchings of the oxidation prevention layer and the conduction layer to a certain thicknesses of areas except the gate pole area, forming an oxide film by an oxidation of the exposed portion of the conduction layer, carrying out a selective etching of the oxide film by using the oxidation prevention layer as a mask, forming a high density impurity area of a second conduction type in a predetermined area of the semiconductor substrate by a high density ion injection of the second conduction type impurity, removing the oxidation prevention layer and the oxide film, forming a low density impurity area of the second conduction type in a predetermined area of the semiconductor substrate by a low density ion injection of impurity of the second conduction type using the conduction layer as a mask, and carrying out an annealing under an oxidation process atmosphere.

REFERENCES:
patent: 5071777 (1991-12-01), Gahle
patent: 5100815 (1992-03-01), Tsubone et al.
patent: 5100820 (1992-03-01), Tsubone

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