Method for fabrication of offset gate MIS device

Details Method for fabrication of offset gate MIS device Method for fabrication of offset gate MIS device

1978-05-26

1981-03-31

Tupman, W. C.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29578, 148187, 357 59, 357 91, B01J 1700

Patent

active

042584655

ABSTRACT:
An offset gate MIS device is fabricated by forming an insulating film with a gate insulator portion as a part thereof on the surface of a semiconductor substrate having one conductivity type, providing a gate electrode on a portion of the insulating film, using the gate electrode as a mask to apply impurities of the other conductivity type with a first impurity concentration to the surface of the semiconductor substrate through the insulating film, forming a shielding film on the surface of that portion of the insulating film which is near the gate insulator portion beneath the gate electrode, using the shielding film as a mask to remove an unmasked portion of the insulating film so as to selectively expose the surface of the semiconductor substrate, applying impurities of the other conductivity type with a second impurity concentration higher than the first impurity concentration to the exposed surface of the semiconductor substrate, and heating the resultant structure to diffuse the impurities into the semiconductor substrate to form source and drain regions therein.

REFERENCES:
patent: 3533158 (1970-10-01), Bower
patent: 3739237 (1973-06-01), Shannon
patent: 3747203 (1973-07-01), Shannon
patent: 3787962 (1974-01-01), Yoshida
patent: 3996657 (1976-12-01), Simko
patent: 4033026 (1977-07-01), Pashley
patent: 4075754 (1978-02-01), Cook

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