Method for fabricating Tungsten local interconnections in high d

Semiconductor device manufacturing: process – Forming schottky junction – Using refractory group metal

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438647, 438648, 257360, H01L 2128, H01L 214763

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active

058829920

ABSTRACT:
The present invention provides a method for fabricating tungsten local interconnections in high density CMOS circuits, and also provides high density CMOS circuits having local interconnections formed of tungsten. Pursuant to the method, an etch stop layer of chromium is initially deposited on the circuit elements of the CMOS silicon substrate. Next, a conductive layer of tungsten is non-selectively deposited on the chromium layer. A photoresist mask is then lithographically patterned over the tungsten layer. The tungsten layer is then etched down to, and stopping at, the chromium layer, after which the photoresist mask is stripped. The stripping preferably uses a low temperature plasma etch in O.sub.2 at a temperature of less than 100.degree. C. Finally, a directional O.sub.2 reactive ion etch is used to remove the chromium layer selectively to the silicon substrate. Borderless contacts are formed with the aid of the chromium etch stop layer beneath the tungsten local interconnection layer. The method of integration of this approach results in anisotropic metal lines patterned over topography using a standard photoresist mask. This approach also allows partial overlap of contacts to reduce device dimensions, and thereby results in improved density and performance.

REFERENCES:
patent: 4371589 (1983-02-01), Warner et al.
patent: 4511634 (1985-04-01), Nickol
patent: 4612257 (1986-09-01), Broadbent
patent: 4914538 (1990-04-01), Howard et al.
patent: 4925524 (1990-05-01), Beatty
patent: 4985310 (1991-01-01), Agarwala et al.
patent: 4999255 (1991-03-01), Jackson et al.
patent: 5176792 (1993-01-01), Fullowan et al.
patent: 5700739 (1997-12-01), Chaing et al.
patent: 5730834 (1998-03-01), Gabriel
Tachi et al., "Low-Temperature Dry Etching," Journal of Vacuum Science & Tech. vol. 9, No. 3, May/Jun. 1991, pp. 796-803.

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