Method for fabricating storage capacitor using high...

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S003000, C438S240000, C438S244000, C438S253000, C438S386000, C257S306000, C257S310000

Reexamination Certificate

active

06403441

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more specifically, it relates to a method for manufacturing a semiconductor memory element having a capacitor such as a DRAM.
2. Description of the Related Art
Semiconductor memory devices that store data by accumulating an electrical charge at a capacitor electrode in the known art include dynamic random access memory (DRAM), ferroelectric random access memory (FRAM). Extensive research has been conducted into further miniaturization of memory cells in these semiconductor storage devices in order to respond to the need for assuring a larger capacity for storage and for achieving higher integration of elements in recent years.
However, when memory cells are miniaturized, a problem arises in that since the capacity of the capacitor becomes reduced due to reduced capacitor area, erroneous operation in data call-out may be caused by noise or the so-called leak current, i.e., the accumulated electrical charge flowing out in the area between the capacitor portion and the electrode, may occur, which will result in data being changed. In addition, there is another problem in that when memory cells are more miniaturized, it becomes difficult to assure a sufficient capacitor capacity simply by forming a capacitor on the gate electrode.
As a means for addressing these problems, a method has been proposed whereby an insulating film material having a high dielectric constant is used as the capacitor insulating film. For instance, application of crystal having a perovskite crystal structure such as barium titanate strontium (Ba, Sr) TiO
3
: hereafter abbreviated to BST) which has a higher dielectric constant compared to those of SiO
2
films and Si
3
N
4
films by a factor of several tens as capacitor films in semiconductor memories such as DRAM described above, has been considered.
FIG. 10
illustrates a common method for manufacturing a DRAM using a film with a high dielectric constant such as a BST film. Namely, first, as illustrated in FIG.
10
(
a
), after forming an n-type diffusion layer area
2
on, for instance, a p-type silicon substrate
1
through an ion implantation method, an oxide film is deposited through, for instance, the CVD (chemical vapor-phase epitaxy) method to form a layer insulating film
3
. Next, by employing the photolithography method and dry etching technology, a contact hole passing through to the n-type diffusion layer
2
is formed, and following this step, a polycrystal silicon plug
4
is formed by doping phosphorus within the contact hole.
Then, as illustrated in FIG.
10
(
b
), a barrier metal film (e.g., Ti, TiN)
5
and a capacitor lower electrode film (e.g., Ru)
6
are sequentially formed through sputtering, and by employing regular photolithography and etching technologies, a barrier metal
5
and a capacitor lower electrode
6
are formed.
Then, after forming a dielectric film (e.g., a BST film)
7
through, for instance, sputtering, a capacitor upper electrode (e.g., Ru)
8
is formed through sputtering, thereby completing the production of the memory capacitor portion of the DRAM, as illustrated in FIG.
10
(
c
).
However, it has been confirmed that a phenomenon in which the dielectric constant of the dielectric film
7
, which should be high, becomes reduced, occurs if the film thickness of the dielectric film
7
is reduced relative to that in the prior art in the method commonly adopted in the prior art described above. This phenomenon is considered to be the result of a particular state of the interfaces between the dielectric film
7
and the lower electrode
6
and between the dielectric film
7
and the upper electrode
8
. As a means for achieving a good interface state by addressing this problem, the following methods for manufacturing a capacitor portion have been disclosed.
For instance, Japanese Unexamined Patent Publication No. 1997-82915 discloses a method for manufacturing a capacitor portion with good interfaces formed therein by performing a heat treatment after forming the upper electrode film or the lower electrode film on the film having a high dielectric constant. Namely, as illustrated in FIG.
11
(
a
), first, element isolation areas
32
are formed on a p-type single crystal silicon substrate
31
and then after forming a thermally oxidized film and a polycrystal silicon film on the single crystal silicon substrate a gate electrode is formed
33
. Next, after forming n-type diffusion areas
34
and
35
through ion implantation, a layer insulating film
36
which is constituted of an oxide film is formed. In the next step, contact holes which pass through to the n-type diffusion areas are formed at the layer insulating film
36
, and a polycrystal silicon film
37
is formed inside a contact hole and an impurity such as phosphorus is added. Then, a tungsten silicide film is deposited and a bit line
38
is formed by adopting the photolithography and etching technologies. Next, an oxide film is deposited through the CVD method to form a layer insulating film
39
, and then a polycrystal silicon film
40
containing arsenic is formed inside a contact hole and on the layer insulating film
39
and the polycrystal silicon film
40
is made to fill inside the contact hole.
Then, as illustrated in FIG.
11
(
b
), after depositing a ruthenium film, a capacitor lower electrode
41
is formed. Next, as illustrated in FIG.
11
(
c
), an amorphous BST film
42
is formed. In the following step, as illustrated in FIG.
11
(
d
), a heat treatment is performed within an oxygen atmosphere at a temperature of, for instance, 700 centigrade to form a ruthenium oxide film
43
at the surface of the ruthenium film
41
, thereby forming a good interface for the ruthenium film
41
and the BST film.
In addition, in Jpn. J. Appl. Phys. Vol. 36 (1997), a method for maintaining a good state for the interface between an electrode film and a BST film which is formed above the electrode film by using an oxide conductor having a perovskite crystal structure such as BaRuO
3
, SrRuO
3
or the like to constitute the electrode. Namely, since, if a BST film is formed on a metal electrode such as Pt, a layer with a low dielectric constant is formed at the interface of the electrode and the BST film to reduce the dielectric constant, adoption of an oxide electrode having a perovskite crystal structure which will not form such a low dielectric constant layer is proposed. Furthermore, since the lattice constant of the oxide having such a perovskite crystal structure is very close to the lattice constant of the BST film which also has a perovskite crystal structure, their crystal lattices can achieve a better match when the BST film is formed on the perovskite oxide electrode, which makes it possible to maintain a good state for the interface between the BST film and the electrode. An even better interface condition can be achieved by improving the matching of the crystal lattices through the use of a single crystal BST film without any torsion in the lattice.
However, the structure disclosed in Japanese Unexamined Patent Publication No. 1997-82915 presents a problem in that since the elements constituting the BST film and the ruthenium electrode are made to solid dissolve only through a mutual diffusion achieved by the heat treatment, the heat treatment must be implemented at a high temperature of approximately 700 centigrade in an oxygen atmosphere, which results in the ruthenium electrode and the barrier metal (e.g., TiN) formed under the ruthenium electrode becoming oxidized to an excessive degree. This causes the conductivity of the electrode to become degraded, to reduce the apparent dielectric constant of the dielectric substance. In addition, since the coefficients of diffusion of the various elements constituting the BST film and the ruthenium electrode are different from one another, a transitional layer with an inconsistent composition is formed if the elements are caused to dissolve only through a mutual dif

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for fabricating storage capacitor using high... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating storage capacitor using high..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating storage capacitor using high... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2976092

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.