Method for fabricating stencil mask

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S296000

Reexamination Certificate

active

06210842

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a method for fabricating a stencil mask to be used in a lithographic process, and more particularly to a method for fabricating a stencil mask to be used in an E-beam process.
2. Description of the Prior Art
In general, a silicon-on-insulator (SOI) wafer is useful as a cell projection type mask. The SOI device is formed in such a manner that, on a semiconductor substrate, there is a formed silicon oxide film serving as an insulating film on which a silicon layer is then formed.
In this sense, a method for the fabrication of a stencil mask according to the prior art will now be described below with reference to
FIGS. 1 through 7
.
FIGS. 1 through 7
are cross-sectional views illustrating a method of fabricating a cell projection type mask according to the prior art, respectively. The prior method for fabricating the cell projection type mask comprises a process of forming a SOI substrate. The SOT substrate, as shown in
FIG. 1
, consists of a semiconductor substrate
10
on which a buried oxide film
12
and a silicon layer
14
are sequentially formed.
After that, as shown in
FIG. 2
, a first photoresist film pattern
16
of a selected thickness is formed on an upper surface of the SOI substrate.
Next, using the first photoresist film pattern
16
as a mask, the silicon layer
14
is patterned, as shown in FIG.
3
. Then, the first photoresist film
16
(
FIG. 2
) is removed.
Afterwards, a first silicon oxide film
18
is formed on a lower surface of the semiconductor substrate
10
, and then, a silicon nitride film
20
and a second silicon oxide film
22
are formed sequentially on lower and upper surfaces of an entire structure, as shown in FIG.
4
. At this time, the first silicon oxide film
18
, the silicon nitride film
20
, and the second silicon oxide film
22
are formed over the entire surface of a wafer constituting a mask substrate.
Thereafter, for every die, a desired photoresist pattern
24
is formed on the second silicon oxide film
22
formed on the lower surface of the substrate
10
, as shown in FIG.
5
. Then, using the formed photoresist pattern as a mask, the second silicon oxide film
22
is patterned to form a second silicon oxide film pattern
22
a
, as shown in FIG.
6
.
Next, using the second silicon oxide pattern
22
a
as a mask, the silicon nitride film
20
is patterned to form a silicon nitride film pattern
20
a.
Subsequently, using the silicon nitride film pattern
20
a
as a mask, the first silicon oxide film
18
is patterned to form a first silicon oxide film pattern
18
a
, as shown in FIG.
7
.
Following this, the lower surface of the substrate
10
is slantly etched using the first silicon oxide film
18
a
until the buried oxide film
12
is exposed. In this way, a stencil mask is fabricated.
In the above-described prior method for the fabrication of the stencil mask, the silicon nitride film
20
to be used as the etch mask on the lower surface of the semiconductor substrate
10
is formed over the entire surface of the wafer.
As generally known in the art, however, the silicon nitride film
20
in its nature is sensitive to stress depending on its thickness and surface area. In particular, cracks may be generated in the silicon nitride film in the direction of the applied stress. This may lead to the generation of defects throughout the entire surface of the wafer when etching the silicon substrate
10
at its lower surface.
Further, as shown in
FIG. 7
, when the silicon nitride film
20
is placed between the first silicon oxide film
18
and the second silicon oxide film
22
, it is stressed by the underlying second silicon oxide film
22
and also due to the difference in the thermal expansive coefficients in every process, so that cracks are formed on the silicon nitride film
20
. These cracks are infiltrated with a wet etching solution in a subsequent etching process, thereby causing defects throughout the entire surface of the wafer.
Meanwhile,
FIG. 8
is a scanning electronic microscope photograph showing, in a cross-section, a lower surface structure of the semiconductor substrate
10
after the silicon nitride film pattern
20
a
is formed on the lower surface of the semiconductor substrate
10
, and the first silicon oxide film
18
is then etched using the silicon nitride film pattern
20
a
as a mask. As can be seen in
FIG. 8
, the patterned silicon nitride film has the formed cracks.
AS described above, the disadvantage of the method for fabricating the stencil mask according to the prior art can be summarized as follows. When the silicon nitride film is placed between the first silicon oxide film and the second silicon oxide film, the silicon nitride film is stressed by the underlying second silicon oxide film and also due to the difference in the thermal expansive coefficients in every process, so that cracks are formed on the silicon nitride film. These cracks are problematic in that they are infiltrated with an wet etching solution in a subsequent etching process, thereby causing defects throughout the entire surface of the wafer.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a method for the fabrication of a stencil mask capable of inhibiting the generation of stress in the silicon nitride film.
In one embodiment, this invention provides a method of fabricating a stencil mask comprising steps of: preparing a mask substrate; forming a silicon nitride film over the entire lower surface of the mask substrate; patterning the silicon nitride film to divide it into at least two sub-portions; and patterning the mask substrate using the patterned silicon nitride film as a mask.
In an another embodiment, this invention provides a method of fabricating a stencil mask comprising steps of: (a) forming a fist silicon oxide film over the entire lower surface of a mask substrate; (b) forming a silicon nitride film over the entire exposed surface of the first oxide nitride film; (c) dividing the silicon nitride film into at least two sub-portions to form at least two primary silicon nitride film patterns; (d) patterning the primary silicon nitride film patterns into secondary silicon nitride film patterns, respectively; (e) patterning the first silicon oxide film using the secondary silicon nitride film patterns as a mask; and (f) patterning the mask substrate using the patterned first silicon oxide film as a mask.


REFERENCES:
patent: 5520297 (1996-05-01), Kagami et al.
patent: 5763121 (1998-06-01), Randall
patent: 5858576 (1999-01-01), Takashi et al.
patent: 0 866372 A1 (1998-09-01), None

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