Method for fabricating solid state image sensor

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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Details

C438S060000, C438S075000, C438S076000, C438S144000, C438S146000, C257S215000, C257S225000, C257S229000

Reexamination Certificate

active

06210990

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a solid state image sensor, and more particularly, to a method for fabricating a solid state image sensor, which can improve a charge transfer efficiency of an end terminal.
2. Background of the Related Art
Referring to
FIG. 1
, a related art solid state image sensor is provided with a plurality of photodiodes (PD)
1
each for converting a light signal into an electrical video charge signal, vertical charge coupled devices (VCCD)
2
each for transporting a video charge converted by the photodiode
1
in a vertical direction, a horizontal charge coupled device (HCCD)
3
for transporting the video charge transported in the vertical direction by the VCCD's
2
in a horizontal direction, an end terminal inclusive of a sensing amplifier
4
for sensing the video signal charge transported in the horizontal direction by the HCCD
3
.
A related art method for fabricating an end terminal of a solid state image sensor will be explained with reference to the attached drawings.
FIG. 2
illustrates a layout of a related art end terminal of a solid state image sensor.
FIG. 3
illustrates a section across line I—I in
FIG. 2
, and
FIGS. 4
a
and
4
b
illustrate plan views showing the steps of a related art method for fabricating an end terminal of a solid state image sensor.
FIG. 5
illustrates levels of potentials across line II—II in
FIG. 4
b
, and
FIG. 6
illustrates levels of potentials across line
111

111
in
FIG. 4
b.
Referring to
FIGS. 2 and 3
, the related art end terminal of a solid state image sensor is provided with a p type well
12
formed in a surface of an n type semiconductor substrate
11
, a bulk charge coupled device (BCCD)
13
formed in a surface of the p type well
12
, transfer gates
14
for the HCCD
3
formed on the semiconductor substrate with an insulating film in between, insulated from one another, an output gate (OG)
15
formed on the semiconductor substrate
11
with an insulating film in between on one side of the transfer gates
14
insulated therefrom, a reset gate
16
formed on the semiconductor substrate
11
with an insulating film in between on one side of the output gate
15
spaced therefrom, a heavily doped n type floating diffusion region (FD)
17
formed in the BCCD
13
between the output gate
15
and the reset gate
16
and connected to the sensing amplifier
4
, and a heavily doped n type reset drain region
18
formed in a surface of the BCCD
13
on one side of the reset gate
16
.
Referring to
FIGS. 4
a
and
4
b
, a related art method for fabricating an end terminal of a solid state image sensor starts from coating a photoresist film
21
on a semiconductor substrate (not shown) in a state a p type well (not shown) is formed in a surface of the semiconductor substrate having an n type floating diffusion region
17
and a reset drain region
18
defined thereon and a BCCD is formed in a surface of the p type well. Subjecting the photoresist film
21
to selective exposure and development leaving a portion of the photoresist film
21
under which a floating diffusion region
17
is to be formed. The photoresist film
21
, subjected to selective exposure and development, is used as mask in injecting p type impurity ions into an entire surface. As shown in
FIG. 3
, this p type impurity ion injection increases a concentration of the impurity only in a portion ‘H’ of the BCCD
13
at which the floating diffusion region
17
is to be formed. In following steps, transfer gates
14
, an output gate
15
, a reset gate
16
, floating diffusion region
17
, and a reset drain region
18
are formed.
Levels of potentials in the related art end terminal of a solid state image sensor having p type impurity ions injected thereto are shown in
FIG. 5
, and in particular the even potential of output gate
15
can be noted.
FIG. 6
, shows the HCCD
3
having an even potential between a point ‘A’ and a point ‘B’.
However, the related art method for fabricating a solid state image sensor has a problem in that the charge transfer efficiency of the end terminal of the solid state image sensor is low due to small variations of potential coming from the even potentials both in the output gate and a central portion of the HCCD. The problem is caused by the p type impurity ion injection increasing a concentration of impurities only in a portion H’at which the floating diffusion region is to be formed.
SUMMARY OF THE INVENTION
Accordingly, the invention is directed to a method for fabricating a solid state image sensor that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An aspect of the invention is to provide a method for fabricating a solid state image sensor, which can form an end terminal of a solid state image sensor having a greater variation of potentials.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The aspects and advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described, the method for fabricating a solid state image sensor, includes the steps of (1) providing a first conduction type substrate having a second conduction type well and a BCCD formed therein for an end terminal, (2) continuously increasing impurity concentrations in an area of the substrate in which a floating diffusion region is to be formed and a portion of an area of the substrate other regions are to be formed for improving a horizontal charge transfer efficiency, and (3) forming transfer gates, an output gate, and a reset gate on the substrate, and the floating diffusion region and a reset drain region in the BCCD, respectively.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5024963 (1991-06-01), Park et al.
patent: 5441910 (1995-08-01), Nakashiba
patent: 5578511 (1996-11-01), Son
patent: 5591997 (1997-01-01), Guidash et al.
patent: 5981309 (1999-11-01), Kim et al.

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