Abrading – Abrading process – With tool treating or forming
Reexamination Certificate
1999-11-18
2001-12-25
Rose, Robert A. (Department: 3723)
Abrading
Abrading process
With tool treating or forming
C125S011010, C451S040000
Reexamination Certificate
active
06332833
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a silicon semiconductor discrete wafer of the double-layer structure having the impurity diffused layer and the impurity non-diffused layer which is used as a discrete (discrete element) of the transistor, diode, thyristor or the like.
2. Discussion of Background Information
In one method of fabricating a discrete wafer which has been put into a practical use, impurity diffused layers are formed on both surfaces of a wafer at a predetermined thickness under a predetermined temperature and atmosphere. Thereafter one diffused layer is removed by a grinding process from one surface of the wafer and the exposed surface of the impurity non-diffused layer at the center is finally polished as the mirror surface. In another recently introduced method with an aim toward reducing the amount of raw materials, an impurity diffused layer is formed on both surfaces of a wafer that is two times thicker than a desired wafer thickness considering a series of fabrication processes. The wafer is then cut into two pieces at the center of the thickness. The cutting surfaces are then ground and finally polished as the mirror surfaces. Moreover, the cutting process is classified into a single wafer process in which wafers are supplied, cut and retrieved one by one by means of an ID saw slicing machine and a process in which a wafer is sequentially cut from a laminated body formed by many wafers which are laminated and bonded or many wafers are cut at a time from the laminated body with a wire saw or the like. In addition, final polishing to a mirror surface is performed in the following sequence. Namely, a wafer and a glass plate are washed, and the wafer is adhered to the glass plate using a wax under a heated and pressurized condition in a vacuum atmosphere. Thereafter, the wafer surface is polished with a pressurized abrasive cloth using an ultra-fine powder abrasive agent. The wafer is then separated from the glass plate and the wax remaining on the wafer surface is removed by rinsing with a solvent.
The silicon semiconductor wafer can be classified into the IC wafer and discrete wafer depending on the application purposes. Here, the absolute thickness and its accuracy required for the wafer will be described. In the case of the IC wafer, since the working area is limited to the extreme surface, cleanliness, flatness and roughness, etc. of the surface are becoming more important as the integration density is increasingly improved; however, thickness of the wafer is considered only for increasing the strength and does not directly participate in improvement of characteristic. In the case of the discrete wafer, on the other hand, when the wafer is completed as an element, its characteristic is determined by the internal structure of the wafer as a whole. Particularly, thickness of the impurity non-diffused layer decisively gives the basic characteristic of the element and if thickness of one impurity diffused layer is constant, the thickness of the impurity non-diffused layer becomes equal to the problem of the total thickness of the wafer, determining the characteristic of the element. The discrete wafer is quite different from the IC wafer in this point. Therefore, improvement of thickness accuracy (deviation from the target thickness, taper in the water surface) of the discrete wafer is increasingly required to realize uniform characteristic when the wafer is completed as an element. In regard to this point, it is impossible to cover with the existing method of fabricating a discrete wafer.
The largest reason is that processing is executed only for the single surface in the final grinding for the mirror surface and the wafer is bonded to the glass plate with a wax but since the final thickness of the discrete wafer is extremely thin (about a half of the thickness of the IC wafer) and the wax provided between the wafer and glass plate will directly influence the quality of wafer such as thickness, waving or recess due to existence of foreign matter, the very high thickness accuracy obtained by the grinding with the current surface grinding machine may be rather deteriorated by the final grinding to the mirror surface. Moreover, a series of processes in relation to the final grinding for mirror surface requires a longer time which has been a large barrier for reduction of fabrication cost.
An object of the present invention is therefore to provide a method of fabricating a semiconductor discrete wafer which assures sufficient final accuracy to cope with the strict requirement in the thickness of the discrete wafer and also assures superiority in the fabrication cost.
SUMMARY OF THE INVENTION
The present invention has solved the problems discussed above by introducing, in place of the existing final grinding to mirror surface using a wax after the grinding process of a wafer, a wet etching process which can directly maintain excellent wafer thickness accuracy after the grinding process and assures excellent productivity.
Namely, a first aspect of the present invention is characterized in the method of fabricating silicon semiconductor discrete wafer of a double-layer structure having an impurity diffused layer at one side of the silicon semiconductor wafer and an impurity non-diffused layer at the other side thereof, wherein a diffused layer where an impurity diffused layer is formed on both sides of a silicon semiconductor wafer or an oxide film is formed on the surface of diffused layer is cut into two pieces at the center of the wafer thickness with an ID saw slicing machine, both cutting surfaces are ground up to the predetermined thickness with a surface grinding machine, both cutting surfaces are lapped with an abrasive grain of the count #2000 or more but #6000 or less and the lapped surfaces are completed by the wet etching. Moreover, a second aspect of the present invention is characterized in the method of fabricating silicon semiconductor discrete wafer of a double-layer structure having an impurity diffused layer at one side of the silicon semiconductor wafer and an impurity non-diffused layer at the other side thereof, wherein a diffused layer where an impurity diffused layer is formed on both sides of a silicon semiconductor wafer or an oxide film is formed on the surface of diffused layer is cut into two pieces at the center of the wafer thickness with an ID saw slicing machine, both cutting surfaces are ground with a grinding wheel with count of #2000 or more but #6000 or less and the ground surfaces are completed by the wet etching.
REFERENCES:
patent: 1413060 (1922-04-01), Roberts
patent: 4027648 (1977-06-01), Bonnice
patent: 5024867 (1991-06-01), Iwabuchi
patent: 5240882 (1993-08-01), Satoh et al.
patent: 5360509 (1994-11-01), Zakaluk et al.
patent: 5429711 (1995-07-01), Watanabe et al.
patent: 5472909 (1995-12-01), Akatsuka et al.
patent: 5788561 (1998-08-01), Pearlman et al.
patent: 5851924 (1998-12-01), Nakazawa et al.
patent: 0074571 (1987-04-01), None
patent: 0003772 (1991-01-01), None
patent: 404256575 (1992-09-01), None
patent: 405253838 (1993-10-01), None
patent: 8-316180 (1996-11-01), None
Ohshima Hisashi
Satoh Tsutomu
Greenblum & Bernstein P.L.C.
Naoetsu Electronics Company
Rose Robert A.
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