Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-02-01
1999-08-10
Arroyo, Teresa M.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438437, 438701, 438978, 148DIG50, 148DIG161, H01L 2176
Patent
active
059373091
ABSTRACT:
A method for fabricating a shallow trench isolation (STI) structure in a semiconductor substrate. A stop layer is formed on the substrate and a first sacrificial layer is formed on the stop layer. The first sacrificial layer and the stop layer are defined to form an opening on the substrate. A conformal second sacrificial layer with rounded corners is formed on the substrate. The second sacrificial layer, the first sacrificial layer, and a portion of the substrate are anisotropically removed to form a trench in the substrate using the stop layer as a removal stop layer. The substrate is over removed using the stop layer as a mask layer so that spacers of the second sacrificial layer are remained on the substrate to cover portions of sidewalls of the stop layer.
REFERENCES:
patent: 5674775 (1997-10-01), Ho et al.
patent: 5801083 (1998-09-01), Yu et al.
Arroyo Teresa M.
Huang Jiawei
Pham Long
United Semiconductor Corp.
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