Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
1999-10-27
2001-05-01
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S003000
Reexamination Certificate
active
06225185
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for fabricating semiconductor memories and, in particular, to a method for fabricating a semiconductor memory using a ferroelectric capacitor as a charge storage capacitor.
Ferroelectrics typified by Pb(Zr
x
Ti
1−x
)O
3
(hereinafter, expressed as “PZT”) or SrBi
2
Ta
2
O
9
(hereinafter, expressed as “SBT”), by virtue of their having high dielectric constant and spontaneous polarization, have been being developed for applications to large capacity DRAMs and nonvolatile memories. For implementation of high density semiconductor memories using ferroelectrics, it is necessary to form stack type memory cells.
The stack type memory cell is a structure that an underlayer selective transistor and a charge-storage capacitor are connected to each other via a contact plug. When polysilicon with impurities diffused therein at high concentration is used as the contact plug (hereinafter, referred to as “polysilicon plug”), platinum, iridium, iridium oxide or the like used for a lower electrode of the ferroelectric capacitor reacts with silicon, making it impossible to obtain a stable contact resistance. Due to this, a diffusion barrier layer of titanium nitride or the like is provided so as to suppress the reaction between lower electrode and silicon.
Meanwhile, a ferroelectric film, when subjected to semiconductor fabricating process such as etching process, suffers serious damage due to the process so that its ferroelectric characteristics considerably deteriorates. For example, in dry etching process, while the substrate is exposed to charged particles, there occur various electrification phenomena, which causes deterioration of dielectric characteristics or insulating characteristics of the ferroelectric film. Further, wet etching process such as cleaning also causes deterioration of the dielectric characteristics or insulating characteristics of the ferroelectric film.
The damage due to these processes is normally recovered to the initial state by carrying out heat treatment in a high-temperature oxygen-containing atmosphere of about 500-700° C. A cross-sectional structure after the processing of the lower electrode and the barrier metal is shown in FIG.
6
.
In
FIG. 6
, reference numeral
21
denotes a silicon substrate,
22
denotes LOCOS (local oxidation of silicon) oxide for device isolation,
23
denotes gate oxide,
24
denotes a gate electrode,
25
denotes source and drain regions of a transistor,
26
denotes a first interlayer insulator,
27
denotes a polysilicon plug,
28
denotes a barrier metal, for example, a nitride of a tantalum and silicon alloy (TaSiN),
29
denotes a lower electrode, for example, iridium,
30
denotes an SBT film, which is a ferroelectric film,
31
denotes an upper platinum electrode, and
32
denotes oxidized portions of the lower electrode and the barrier metal.
In the state that the processing for up to the lower electrode and the barrier metal layer has been done, it is impossible to carry out heat treatment in a high-temperature oxygen-containing atmosphere. That is, the barrier metal of titanium nitride or tantalum nitride, tungsten nitride, TaSiN or a nitride of a titanium-silicon alloy (TiSiN) or the like and the lower electrode of iridium or the like are easily oxidized during the heat treatment in an oxygen-containing atmosphere (portions indicated by numeral
32
in FIG.
6
). Therefore, the lower electrode
29
or the barrier metal
28
, when subjected to heat treatment in the exposed state, is easily oxidized, incurring volume expansion or cohesion, which causes hillocks or peelings or impairment of electrical conduction between contact plug and lower electrode, thus making it impossible to carry out the heat treatment in an oxygen-containing atmosphere.
To avoid this problem, it has conventionally been practiced to carry out heat treatment in an inert gas atmosphere such as nitrogen.
However, heat treatment in an inert gas atmosphere could not allow the capacitor to recover enough. As a result, a ferroelectric capacitor obtained would be poor in electrical characteristics and exhibit unstable behavior, with the result of lower yields. In order to obtain a ferroelectric capacitor having good electrical characteristics and high reliability, it is essential to carry out heat treatment in a high-temperature oxygen-containing atmosphere without causing volume expansion or cohesion due to the oxidation of the lower electrode and the barrier metal.
SUMMARY OF THE INVENTION
The present invention having been accomplished in view of the above problems, an object of the invention is to obtain a ferroelectric capacitor having good electrical characteristics and high reliability by carrying out a high-temperature heat treatment in an oxygen-containing atmosphere after the processing of the lower electrode and the formation of the oxidation barrier layer and, thereby, preventing the volume expansion and cohesion.
In order to achieve the above-mentioned object, the present invention provides a method for fabricating a semiconductor memory in which a transistor is formed on a semiconductor substrate, an interlayer insulator film is formed on the transistor, a contact plug is formed in the interlayer insulator film, a lower electrode film, a ferroelectric film as a capacitor insulator film and an upper electrode film are formed above the interlayer insulator film including the contact plug, a capacitor is formed by sequentially patterning the upper electrode film, the ferroelectric film and the lower electrode film, and the capacitor and the transistor are electrically connected to each other with the contact plug, comprising the steps of forming an oxidation barrier layer on the capacitor in such a manner that at least the capacitor is covered with the oxidation barrier layer after forming the capacitor, and heat treating the in-process semiconductor memory in an oxygen-containing atmosphere after forming the oxidation barrier layer on the capacitor.
By adopting the above method, it becomes possible to recover ferroelectric characteristics without causing oxidation of the lower electrode and the barrier metal.
In an embodiment of the present invention, the oxidation barrier layer is composed of an oxide of at least one or more kinds of elements out of titanium and tantalum, or silicon nitride.
In an embodiment of the present invention, film thickness of the oxidation barrier layer is 250 Å or more and 500 Å or less.
REFERENCES:
patent: 5638319 (1997-06-01), Onishi et al.
patent: 5858851 (1999-01-01), Yamagata et al.
patent: 6027947 (2000-02-01), Evans et al.
patent: 8-335673 (1996-12-01), None
patent: 9-331031 (1997-12-01), None
Ishihara Kazuya
Yamazaki Shinobu
Lee Calvin
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
Smith Matthew
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