Method for fabricating semiconductor integrated circuit device u

Details Method for fabricating semiconductor integrated circuit device u Method for fabricating semiconductor integrated circuit device u

1990-01-26

1992-04-14

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437192, 437195, 437200, H01L 2144

Patent

active

051048264

ABSTRACT:
In a CVD contact formed on a shallow junction having a depth of 0.2 micron or less, the presence of aluminum generates a leakage current at the junction after heat treatment. In order to restrain the leakage current, a barrier metal is formed below the aluminum electrode to form an Al/barrier metal/CVDW (tungsten) structure. A contact free from junction leakage and having a high aspect ratio is thereby realized.

REFERENCES:
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patent: 4800177 (1989-01-01), Nakamae
patent: 4822753 (1989-04-01), Pintchovski et al.
patent: 4851369 (1989-07-01), Ellwanger et al.
R. S. Schutz, "TiN as a Diffusion Barrier Between CoSi.sub.2 or P+Si and Aluminum", MRS Proceedings, vol. 18, No. 89 (1982), pp. 89-99.
Y. Pauleau, "Interconnect Materials for VLSI Circuits", Solid State Technology, Apr. 1987, pp. 155-162.
C. Y. Ting, "TiN found by Evaporation as a Diffusion Barrier Between Al and Si,", J. Vac. Sci. Tech., vol. 21, No. 1, May/Jun. 1982, pp. 14-18.
T. Nishida et al., "Multilevel Interconnection for Half-Micron ULSI's", 1989 VMIC Conference, Jun. 12-13, 1989, pp. 19-25.
E. Broodbent et al., "The High-Temperature Stability of CVD W-S; Couples RTA in NH.sub.3 and Ar", Journal of Applied Physics, vol. 64, No. 12, Dec. 1988, pp. 6721-6726.

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