Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2009-04-28
2010-06-29
Menz, Laura M (Department: 2813)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S699000, C438S601000
Reexamination Certificate
active
07745343
ABSTRACT:
A method for fabricating a semiconductor device with a fuse element includes providing a semiconductor structure with a fuse element formed over a first device region thereof. A first interlayer dielectric layer, an etching stop layer and a second interlayer dielectric layer are sequentially formed. A bond pad is formed over the second interlayer dielectric layer in a second device region of the semiconductor structure. A passivation layer is formed over the bond pad and the second interlayer dielectric layer. A first etching process is performed to form a first opening in the first device region and a second opening in the second device region, wherein the first opening exposes a portion of the second interlayer dielectric layer over the fuse element and, and the second opening partially exposes a portion of the bond pad. A second etching process and a third etching process are performed to leave another passivation layer conformably covering the fuse element and the semiconductor structure adjacent thereto.
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Chern Jin-Dong
Lin Kwang-Ming
Liu Hsing-Chao
Lo Wen-Hsun
Menz Laura M
Quintero Law Office
Vanguard International Semiconductor Corporation
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