Method for fabricating semiconductor device containing excessive

Fishing – trapping – and vermin destroying

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437 41GS, 437 57, 437193, H01L 21283

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active

056521839

ABSTRACT:
A method for fabricating a semiconductor device which includes a metal silicide film for electrically connecting a first silicon region containing a p-type impurity with a second silicon region containing an n-type impurity is disclosed. The method includes the step of depositing the metal silicide film so as to contain excessive silicon. Such excessive silicon is precipitated in silicide grain boundaries in the metal silicide film and thus makes a diffusion path of impurities along the silicide grain boundaries discontinuous.

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C.L. Chu et al., "Technology Limitations for N.sup.30 /P.sup.30 Polycide Gate CMOS due to Lateral Dopant Diffusion in Silicide/Polysilicon Layers", IEEE Electron Device Letters, vol. 12, No. 12, Dec. 1991.
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