Method for fabricating semiconductor device capable of...

Details Method for fabricating semiconductor device capable of... Method for fabricating semiconductor device capable of...

2007-02-20

2007-02-20

Le, Thao P. (Department: 2818)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S738000, C257S640000, C257S649000

Reexamination Certificate

active

11165740

ABSTRACT:
A method for fabricating a semiconductor device where a critical dimension in a peripheral region is decreased. The method includes the steps of: forming a silicon nitride layer on a substrate including a cell region and a peripheral region; forming a silicon oxynitride layer on the silicon nitride layer; forming a line-type photoresist pattern on the silicon oxynitride layer such that the photoresist pattern in the cell region has a width larger than that of a final pattern structure and the photoresist pattern in the peripheral region has a width that reduces an incidence of pattern collapse; etching the silicon oxynitride layer and the silicon nitride layer until widths of a remaining silicon oxynitride layer and a remaining silicon nitride layer are smaller than the width of the photoresist pattern used as an etch mask through suppressing generation of polymers; and over-etching the remaining silicon nitride layer.

REFERENCES:
patent: 6774043 (2004-08-01), Yamaguchi et al.
patent: 2004/0102041 (2004-05-01), Okudaira
patent: 2004/0211981 (2004-10-01), Terauchi et al.
patent: 2005/0009358 (2005-01-01), Choi et al.

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