Fishing – trapping – and vermin destroying
Patent
1994-12-16
1995-08-22
Fourson, George
Fishing, trapping, and vermin destroying
437 89, 148DIG12, H01L 2176
Patent
active
054440149
ABSTRACT:
Disclosed is a method of fabricating an SOI substrate, comprising the steps of forming a first insulating layer on a single crystal silicon substrate; patterning the first insulating layer to form an opening; growing a single crystal silicon in the opening to form active and inactive regions; polishing the active region 31 as the first insulating layer as a polishing stopper to form a planarized surface; depositing a second insulating layer on the planarized surface; bonding a bonding substrate to the second insulating layer; and polishing the silicon substrate using the first insulating layer as a stopper up to a surface of the active region. By the method, a stray capacitance occurring between an SOI substrate and a metal wiring portion formed thereon can be significantly reduced owing to a relatively thick insulating layer therebetween, and a parasitic capacitance can be eliminated owing to an insulating layer interposed between a bonding substrate and an active region to be used as a buried collector.
REFERENCES:
patent: 3929528 (1975-12-01), Davidson et al.
patent: 5298449 (1994-03-01), Kikuchi
Cho Deok-Ho
Han Tae-Hyeon
Kang Jin-Young
Lee Seong-Hearn
Lee Soo-Min
Electronics and Telecommunications Research Institute
Fourson George
Korea Telecommunication Authority
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