Method for fabricating semiconductor device

Fishing – trapping – and vermin destroying

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

437238, 437228, 148DIG25, H01L 213105

Patent

active

056912374

ABSTRACT:
A semiconductor substrate 11 having concavities and convexities in the upper surface, and silica particles (granular insulators) 15 provided in the concavities to planarize the entire upper surface of the semiconductor substrate 11 are included. First, the silica particles 15 are laid over an upper surface of a semiconductor substrate 11 to provide the granular insulators 15 in cavities in the upper surface of the semiconductor substrate 11, and the silica particles 15 provided on convexities on the upper surface of the semiconductor substrate 11 are removed, whereby the concavities 11 are buried with the silica particles 15 so as to improve global planarizarion.

REFERENCES:
patent: 3598761 (1971-08-01), Woulbroun et al.
patent: 3660156 (1972-05-01), Schmidt
patent: 4133690 (1979-01-01), Muller
patent: 4222792 (1980-09-01), Lever et al.
patent: 4514580 (1985-04-01), Bartlett
patent: 4732761 (1988-03-01), Machida et al.
patent: 4804254 (1989-02-01), Doll et al.
patent: 5078801 (1992-01-01), Malik
patent: 5160998 (1992-11-01), Itoh et al.
patent: 5258334 (1993-11-01), Lantz, II
patent: 5264395 (1993-11-01), Bindal et al.
patent: 5354697 (1994-10-01), Oostra et al.
patent: 5387480 (1995-02-01), Haluska et al.
patent: 5434451 (1995-07-01), Dalal et al.
patent: 5436083 (1995-07-01), Haluska et al.
patent: 5436084 (1995-07-01), Haluska et al.
patent: 5468685 (1995-11-01), Orisaka et al.
Patent Abstracts of Japan (EPO) No. JP5347284, Dec. 27, 1993--vol. 18, No. 188 "Surface Flattening Method of Polymer Blend Film".
Patent Abstracts of Japan (EPO) No. JP6097298, Apr. 8, 1994--vol. 18, No. 359 "Forming Method of Semiconductor Device Insulating Film".
Patent Abstracts of Japan (EPO) No. JP61212056, Sep. 20, 1986--vol. 11, No. 46 "Solid State Image Pickup Device".
Patent Abstracts of Japan (EPO) No. JP5175194, Jul. 13, 1993--vol. 17, No. 579 "Manufacture of Semiconductor Device".

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for fabricating semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2106517

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.