Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-06-10
2000-11-14
Niebling, John F.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438423, 438424, 438433, 438439, 438449, 438585, 438587, H01L 2176
Patent
active
061469726
ABSTRACT:
Ions are implanted into a silicon nitride film at a dose of not more than 1.times.10.sup.15 cm.sup.-2 so that the projected range of the ions is 20 to 60% of the thickness of the silicon nitride film. This enables the stress of the nitride film to be reduced while enjoying good productivity without introduction of defects into a silicon substrate.
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patent: 4412375 (1983-11-01), Matthews
patent: 4755477 (1988-07-01), Chao
patent: 4968636 (1990-11-01), Sugawara
patent: 5091332 (1992-02-01), Bohr et al.
patent: 5306940 (1994-04-01), Yamazaki
patent: 5413953 (1995-05-01), Chien et al.
patent: 5434099 (1995-07-01), Hsue
patent: 5614434 (1997-03-01), Chao
Stress in ion-implanted CVD Si.sub.3 N.sub.4 films Author--E.P. EerNisse.
Published--Sendia Laboratories, Albequerque, NM Apr. 15, 1997.
Journal of Applied Physics, vol. 48, No. 8 (1977) by E.P. EerNisse pp. 3337-3341.
Gurley Lynne
NEC Corporation
Niebling John F.
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