Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2007-11-20
2007-11-20
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S435000, C438S437000, C257SE21546
Reexamination Certificate
active
11320464
ABSTRACT:
A method for fabricating a semiconductor device includes the steps of sequentially forming a pad oxide layer and a pad nitride layer on a substrate, the pad oxide layer including a first oxide layer formed on an upper surface of the substrate and a second oxide layer formed on a lower surface of the substrate, and the pad nitride layer including a first nitride layer formed on the upper surface of the substrate and a second nitride layer formed on the lower surface of the substrate; patterning the first nitride layer by removing a portion of the first nitride layer; forming a trench in the substrate corresponding to the removed portion of the first nitride layer, thereby patterning the first oxide layer; filling the trench with an insulating material to form a device isolation layer; forming a passivation layer on the substrate, the passivation layer including a first passivation layer formed on the upper surface of the substrate including the device isolation layer, and a second passivation layer formed on the lower surface of the substrate including the second oxide layer and the second nitride layer; and removing the first passivation layer, the patterned first oxide layer, and patterned first nitride layer.
REFERENCES:
patent: 5599722 (1997-02-01), Sugisaka et al.
patent: 2004/0063263 (2004-04-01), Suzuki et al.
patent: 2005/0121705 (2005-06-01), Kawasaki et al.
Dang Trung
Donogbu Electronics Co., Ltd.
McKenna Long & Aldridge LLP
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