Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2006-05-23
2006-05-23
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S123000, C438S124000
Reexamination Certificate
active
07049173
ABSTRACT:
A semiconductor component includes a chip on board leadframe, a semiconductor die back bonded and wire bonded to the leadframe, an encapsulant on the die and an area array of terminal contacts on the leadframe. The leadframe includes leadfingers, interconnect bonding sites for wire bonding the die, terminal bonding sites for the terminal contacts, and bus bars which electrically connect selected leadfingers to one another. The interconnect bonding sites are located on the leadframe relative to the bus bars such that shorting to the bus bars by wire interconnects is eliminated. A method for fabricating the component includes the steps of attaching the die to the leadframe, bonding the wire interconnects to the die and to the interconnect bonding sites, forming the encapsulant, and then forming the terminal contacts on the terminal bonding sites.
REFERENCES:
patent: 4210926 (1980-07-01), Hacke
patent: 5397921 (1995-03-01), Karnezos
patent: 5409865 (1995-04-01), Karnezos
patent: 5420460 (1995-05-01), Massingill
patent: 5581226 (1996-12-01), Shah
patent: 5596225 (1997-01-01), Mathew et al.
patent: 5663593 (1997-09-01), Mostafazadeh et al.
patent: 5684328 (1997-11-01), Jin et al.
patent: 5866939 (1999-02-01), Shin et al.
patent: 5898220 (1999-04-01), Ball
patent: 5969416 (1999-10-01), Kim
patent: 5973393 (1999-10-01), Chia et al.
patent: 5976912 (1999-11-01), Fukutomi et al.
patent: 6028356 (2000-02-01), Kimura
patent: 6064111 (2000-05-01), Sota et al.
patent: 6083776 (2000-07-01), Manteghi
patent: 6114760 (2000-09-01), Kim et al.
patent: 6181000 (2001-01-01), Ooigawa et al.
patent: 6187612 (2001-02-01), Orcutt
patent: 6228683 (2001-05-01), Manteghi
patent: 6310390 (2001-10-01), Moden
patent: 6337510 (2002-01-01), Chun-Jen et al.
patent: 6359221 (2002-03-01), Yamada et al.
patent: 6373447 (2002-04-01), Rostoker et al.
patent: 6415977 (2002-07-01), Rumsey
patent: 6451624 (2002-09-01), Farnworth et al.
patent: 6465877 (2002-10-01), Farnworth et al.
patent: 6501165 (2002-12-01), Farnworth et al.
patent: 6506625 (2003-01-01), Moden
patent: 6507114 (2003-01-01), Hui
patent: 6521483 (2003-02-01), Hashimoto
patent: 6552427 (2003-04-01), Moden
patent: 6589810 (2003-07-01), Moden
patent: 6638792 (2003-10-01), Hui et al.
patent: 6903449 (2005-06-01), Kim et al.
patent: 2002/0027280 (2002-03-01), Corisis et al.
patent: 2002/0031902 (2002-03-01), Pendse et al.
patent: 2002/0068379 (2002-06-01), Cobbley et al.
patent: 2002/0195691 (2002-12-01), Schoenfeld
patent: 6-252194 (1994-09-01), None
Fook Jeffrey Toh Tuck
Kim Dalson Ye Seng
Kuan Lee Choon
Gratton Stephen A.
Micro)n Technology, Inc.
Rose Kiesha
Smith Zandra V.
LandOfFree
Method for fabricating semiconductor component with chip on... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating semiconductor component with chip on..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating semiconductor component with chip on... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3620144