Method for fabricating semiconductor circuits

Details Method for fabricating semiconductor circuits Method for fabricating semiconductor circuits

1989-01-18

1993-03-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 46, 437 47, 437 48, 437 52, 437 60, 437918, H01L 2144

Patent

active

051962330

ABSTRACT:
A method for fabricating a resistive load element for a semiconductor device can be used with standard semiconductor processes. A layer of second level poly is deposited and lightly doped P-type. A resist mask is used to dope selected regions of the poly layer N-type. The poly layer is then patterned to define conductors and resistive load elements. The resistive load elements are formed by back-to-back PN diodes formed at the interfaces between the P-type and N-type regions.

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