Method for fabricating self-aligned CCD devices and their output

Details Method for fabricating self-aligned CCD devices and their output Method for fabricating self-aligned CCD devices and their output

1976-05-05

1978-07-11

Tupman, W.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, B01J 1700

Patent

active

040993175

ABSTRACT:
The specification describes a self-aligning masking technique for the fabrication of charge coupled device-metal oxide semiconductor (CCD/MOS) transistor combinations. Both the CCD devices and the output MOS transistors are formed on the same semiconductor substrate during the same processing steps. Two layers of polycrystalline silicon, isolated from each other by a layer of dielectric material and isolated from the semiconductor substrate by another dielectric layer are used to form two sets of partially overlapping semiconductor strips. These strips and predetermined portions of the substrate are then doped, with a conductivity determining impurity opposite the conductivity type of the substrate. This process produces two self-aligned sets of gate electrodes for a two-phase or a four-phase CCD device and also produces two output self-aligned gate field effect transistors at the end of the CCD array.

REFERENCES:
patent: 3967306 (1976-06-01), Bower
patent: 4028716 (1977-06-01), Gerrit van Santen et al.

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