Method for fabricating polysilicon TFT

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element

Reexamination Certificate

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Details

C438S231000, C438S303000, C438S608000, C438S609000

Reexamination Certificate

active

06395571

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a thin film transistor (TFT), and more particularly, to a method for fabricating a polysilicon TFT suitable for use in an active matrix LCD.
2. Background of the Related Art
Active matrix LCDs used as flat displays in portable computers use thin film transistors (TFTS) as switching devices. Although a polysilicon TFT has better switching performance than an amorphous silicon TFT, the polysilicon TFT has a problem of high leakage in the off state. Structures which can solve the problem of high leakage include the lightly doped drain (LDD) structure and the offset structure.
The LDD structure has lightly doped drain regions between heavily doped drain and source regions, and a channel region. The offset structure has offset regions with no impurity between heavily doped drain and source regions, and a channel region. A related art method of fabricating a polysilicon TFT having an LDD or OFFSET structure requires additional mask and fabrication processes for forming LDD regions or offset regions. Production costs of such polysilicon TFTs are high as the TFT has a complicated fabrication process. Additionally, as the LDD or offset structure has an impurity concentration discontinuity at a boundary of the LDD or offset region, leakage reduction is less than optimal. While it is desirable that there is a continuity of the impurity concentration from the LDD or offset region to the heavily doped impurity region, there has been no appropriate process for obtaining such a structure.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for fabricating a polysilicon TFT having a lightly doped drain (LDD) structure or an offset structure that substantially obviates one or more of the limitations and disadvantages of the related art.
An advantage of the present invention is to provide a method of fabricating a polysilicon TFT having a continuous LDD structure using a simple fabrication process, and which results in reduced leakage.
Another advantage of the present invention is to provide a method for fabricating a polysilicon TFT having a continuous offset structure using a simple fabrication process, and which results in reduced leakage.
Additional features and advantages of the invention will be set forth in the description that follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as shown in the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method for fabricating a TFT includes the steps of (a) forming a semiconductor layer, a gate insulating film, and a gate electrode on a substrate, (b) forming lightly doped impurity regions in the semiconductor layer on both sides of the gate electrode, (c) forming an insulating film with a thickness that gradually becomes thinner as the distance from the gate electrode increases, and (d) forming heavily doped impurity regions in the lightly doped impurity regions such that regions having continuously varying impurity concentrations are formed.
In another aspect of the present invention, there is provided a method of fabricating a TFT, including the steps of (a) forming a semiconductor layer, a gate insulating film, and a gate electrode on a substrate, (b) forming an insulating film having a thickness that gradually becomes thinner away from each side of the gate electrode, and (d) forming heavily doped impurity regions in the semiconductor layer, except at specific regions adjacent to the gate electrode, by injecting impurity ions through the insulating film.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5989945 (1999-11-01), Yudasaka et al.
patent: 6156598 (2000-12-01), Zhou et al.

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