Method for fabricating non-volatile semiconductor memory device

Details Method for fabricating non-volatile semiconductor memory device Method for fabricating non-volatile semiconductor memory device

1993-01-19

1995-07-11

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 48, 437 52, 437984, 257316, H01L 218247

Patent

active

054321107

ABSTRACT:
A method is for fabricating a non-volatile semiconductor memory device with a two-layered gate electrode structure having a control gate electrode and a floating gate electrode. A first insulating film, a first amorphous silicon film, a first gate insulating film, a first polycrystalline silicon film, a second gate insulating film, and a second polycrystalline film are sequentially formed on a semiconductor substrate. Then, using a patterning mask, predetermined regions of the second polycrystalline silicon film, the second gate insulating film, the first polycrystalline silicon film, the first gate insulating film, and the first amorphous silicon film are sequentially and selectively removed, so that only element isolation regions are exposed. Thereafter, after the formation of a control gate electrode, etc., a drain region and a source region are formed on the first amorphous silicon film. In this way, the floating gate electrode and the element isolation region are self-aligned and it is possible to achieve a high density integration of memory cells. Also, there is no leakage current since no diffusion layers are formed on the semiconductor substrate.

REFERENCES:
patent: 5032881 (1991-07-01), Sardo et al.
patent: 5110753 (1992-05-01), Gill et al.
patent: 5210047 (1993-05-01), Woo et al.
patent: 5306935 (1994-04-01), Esquivel et al.

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