Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
2005-11-22
2005-11-22
Schillinger, Laura M (Department: 2813)
Semiconductor device manufacturing: process
Chemical etching
C438S696000, C438S695000
Reexamination Certificate
active
06967165
ABSTRACT:
A method for forming a multilayer interconnect includes: a first step of forming a lower layer interconnect in an upper portion of a first insulating film and then forming a second insulating film and a third insulating film in this order on the first insulating film including the lower layer interconnect; a second step of forming an aperture in part of the third insulating film located above the lower layer interconnect; a third step of forming an interconnect groove in an upper portion of the third insulating film so that an upper portion of the aperture is part of the interconnect groove while reducing the thickness of part of the second insulating film located under the aperture without having the lower layer interconnect exposed; a fourth step of removing part of the second insulating film located under the aperture to expose the lower layer interconnect; and a fifth step of filling a conductive film in the aperture and the interconnect groove and thereby forming an upper layer interconnect and a connection portion for electrically connecting the upper layer interconnect and the lower layer interconnect.
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Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
Schillinger Laura M
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