Method for fabricating metal line in semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material

Reexamination Certificate

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Details

C438S634000, C438S637000, C438S638000, C257SE21641

Reexamination Certificate

active

11298758

ABSTRACT:
A method for fabricating a metal line in a semiconductor device is provided. The method includes: forming an inter-layer insulation layer on a substrate; forming a contact hole by etching the inter-layer insulation layer; forming a metal layer on the inter-layer insulation layer and the contact hole; etching a portion of the metal layer through performing a first etching process; and etching a remaining portion of the metal layer through performing a second etching process until the surface of the inter-layer insulation layer is exposed and a bottom portion of the metal line is sloped.

REFERENCES:
patent: 5888902 (1999-03-01), Jun
patent: 6297145 (2001-10-01), Ito
patent: 6498092 (2002-12-01), Lee et al.
patent: 2003/0060053 (2003-03-01), Ichihashi et al.
patent: 2004/0009656 (2004-01-01), Lee et al.

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