Fishing – trapping – and vermin destroying
Patent
1996-05-10
1997-03-11
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437 44, 437984, H01L 218246
Patent
active
056100922
ABSTRACT:
A NAND type mask ROM having a gate length of one half micron or below is disclosed. For the fabrication of this device, gate electrodes are formed on a gate insulating film which is on a P-type silicon substrate and in which a memory cell region and a peripheral transistor are separately defined by a field oxide film. Then, N.sup.- -type diffusion layers are formed, and then an insulating layer is deposited by a biased ECRCVD process. The insulating film is not formed on edges of the memory cell gate electrodes so that, when the entire surface of the insulating film is etched-back, side walls are formed only in the peripheral transistor region. By subsequently forming N.sup.+ -type diffusion layers, N-channel cell transistors and an N-channel LDD transistor 11 are formed in a self-aligned form. The resulting structure permits increasing memory cell transistor "on" current without increasing the number of steps and number of masks.
REFERENCES:
patent: 4565712 (1986-01-01), Noguchi et al.
patent: 5429967 (1995-07-01), Hong
patent: 5470774 (1995-11-01), Kunitou
patent: 5514611 (1996-05-01), Kim et al.
Chaudhari Chandra
NEC Corporation
LandOfFree
Method for fabricating large capacity NAND type ROM with short m does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating large capacity NAND type ROM with short m, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating large capacity NAND type ROM with short m will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-443146