Method for fabricating isolation region in semiconductor devices

Details Method for fabricating isolation region in semiconductor devices Method for fabricating isolation region in semiconductor devices

1990-09-14

1993-10-05

Thomas, Tom

Fishing, trapping, and vermin destroying

437228, 437233, 437235, 148DIG50, 257505, 257506, 257618, H01L 21302, H01L 2176

Patent

active

RE0344001

ABSTRACT:
A method for fabricating an isolation region in a semiconductor substrate that produces neither a "bird's beak" nor a "bird's head". A smooth substrate surface is provided, which is preferable for multi-layered wiring. The packing density of devices in a bipolar IC circuit can be increased. A sharp-edged isolation groove having a U-shaped cross-section is made by reactive ion etching. The inner surface of the isolation groove is coated by an insulating film. Then the groove is buried with polycrystalline semiconductor material. The polycrystalline material which is deposited on the surface of the substrate is etched off. At the same time the polycrystalline material in the groove is also etched to a specific depth from the surface. An insulating film is then deposited so as to again fill the groove. Then the substrate surface is polished or etched to provide a flat surface.

REFERENCES:
patent: 3998673 (1976-12-01), Chow
patent: 4104086 (1978-08-01), Bondur et al.
patent: 4233091 (1980-11-01), Kawabe et al.
patent: 4238278 (1980-12-01), Antipov
patent: 4255207 (1981-03-01), Nicolay et al.
patent: 4407851 (1983-10-01), Kurosawa
patent: 4454647 (1984-06-01), Joy
patent: 4473598 (1984-09-01), Ephrath et al.
patent: 4546537 (1985-10-01), Kawabe
Abbas, S. A., "Recessed Oxide Isolation Process," IBM Technical Disclosure Bulletin, vol. 20, No. 1, Jun. 1977.

Affiliated with

Also associated with

Rating

Method for fabricating isolation region in semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating isolation region in semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating isolation region in semiconductor devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-994663