Method for fabricating integrated circuit package with...

Details Method for fabricating integrated circuit package with... Method for fabricating integrated circuit package with...

2005-09-13

2005-09-13

Vigushin, John B. (Department: 2841)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C029S832000, C029S840000

Reexamination Certificate

active

06943060

ABSTRACT:
A semiconductor package with solder bumps and a method for making the same are described. One embodiment comprises a flip-chip design with a rectangular semiconductor die with a relatively large aspect ratio bonded to a substantially square substrate through solder bumps. In one embodiment, active bumps are concentrated in an area relatively close to the neutral point of the die, for example, in a substantially square area about the neutral point.

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patent: 01-238148 (1989-09-01), None
patent: 01238148 (1989-09-01), None

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