Fishing – trapping – and vermin destroying
Patent
1991-04-11
1993-01-12
Thomas, Tom
Fishing, trapping, and vermin destroying
437 29, 437 40, 437 50, 437160, 437164, 437228, 437233, 437235, 148DIG126, 257328, H01L 2170
Patent
active
051790343
ABSTRACT:
A method for fabricating an insulated gate semiconductor device comprises the steps of forming insulated gates on an n.sup.- -layer surface, forming p-well layers in the n.sup.- -layer using the insulated gates as masks, forming phosphosilicate glass layers on the side walls of the insulated gates and diffusing the impurities from the phosphosilicate glass layers into the p-well layers to form n.sup.30 -source layer.
REFERENCES:
patent: 3907617 (1975-09-01), Zwermemann
patent: 4209350 (1980-06-01), Ito et al.
patent: 4417385 (1983-11-01), Temple
patent: 4419810 (1983-12-01), Riseman
patent: 4445267 (1984-05-01), De La Moneda et al.
patent: 4466176 (1984-08-01), Temple
patent: 4503598 (1985-03-01), Vora et al.
patent: 4598461 (1986-07-01), Love
patent: 4639754 (1987-01-01), Wheatley
patent: 4691435 (1987-08-01), Amantha et al.
patent: 4757032 (1988-07-01), Contieno
patent: 4774198 (1988-09-01), Contiero et al.
patent: 4775879 (1988-10-01), Robb et al.
Mori Mutsuhiro
Nakano Yasunori
Tanaka Tomoyuki
Yasuda Yasumichi
Hitachi , Ltd.
Thomas Tom
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