Fishing – trapping – and vermin destroying
Patent
1994-04-04
1996-01-09
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 44, 437 45, H01L 21265
Patent
active
054828783
ABSTRACT:
Insulated gate field effect transistors (10, 70) having process steps for setting the V.sub.T and a device leakage current which are decoupled from the process steps for providing punchthrough protection, thereby lowering a subthreshold swing. In a unilateral transistor (10), a portion (37, 45) of a dopant layer (25, 30) between a source region (48, 51) and a drain region (49, 52) serves as a channel region and sets the V.sub.T and the device leakage current. A halo region (34, 39) contains the source region (48, 51) and sets the punchthrough voltage. In a bilateral transistor (70), both a source region (83, 86) and a drain region (84, 87) are contained within halo regions (75, 74, 79, 81). A portion (76, 82) of a dopant layer (25, 30) sets the V.sub.T and a leakage current, whereas the halo region (75, 79) sets the punchthrough voltage.
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Burger Vida I.
Dow Diann
Kaneshiro Michael H.
Klein Kevin M.
Masquelier Michael P.
Chaudhuri Olik
Dover Rennie William
Dutton Brian K.
Motorola Inc.
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