Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
1999-06-29
2001-04-17
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S060000
Reexamination Certificate
active
06218210
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an image sensor; and, more particularly, to a method for fabricating a CMOS (Complementary Metal Oxide Semiconductor) image sensor with an extended pinned photodiode.
1. Description of the Prior Art
Generally, a CMOS image sensor is an apparatus to convert an optical image into electrical signals and employs MOS (Metal Oxide Semiconductor) transistors. A CCD (Charge Coupled Device) image sensor, as a kind of image sensor, has been widely known. As compared with the CCD image sensor, the CMOS image sensor may be easily driven with the various scanning schemes and integrated with a signal processing circuit on one-chip. Therefore, the CMOS image sensor may miniaturize its size and reduce the fabricating cost by using a compatible CMOS technology and lower the power consumption.
Referring to
FIG. 1
, a conventional unit pixel of a CMOS image sensor is composed of a pinned photodiode (PPD) and four NMOS transistors. The four NMOS transistors include a transfer transistor
102
for transferring photoelectric charges generated in a pinned photodiode to a sensing node, a reset transistor
104
for resetting the sensing node in order to sense a next signal, a drive transistor
106
for acting as a source follower and a select transistor
108
for outputting data to an output terminal in response to an address signal.
The reset transistor
104
and the transfer transistor
102
are made up of a native NMOS transistor so that the charge transfer efficiency is improved. The native NMOS transistor having a negative threshold voltage can prevent electron losses from being generated by a voltage drop due to a positive threshold voltage and then contribute the charge transfer efficiency to be improved.
Referring to
FIG. 2
, the conventional unit pixel of the CMOS image sensor includes a P
+
silicon substrate
201
, a P-epi (epitaxial) layer
202
, a P-well region
203
, field oxide layers
204
, a gate oxide layer
205
, gate electrodes
206
, an N
−
diffusion region
207
, a P
0
diffusion region
208
, an N
+
diffusion region
209
and oxide layer spacers
210
. A pinned photodiode (PPD) has a PNP junction structure in which the P-epi
202
, the N
−
diffusion region
207
and the P
0
diffusion region
208
are stacked. Such a pinned photodiode includes two p-type regions, each of which has the same potential so that the N
−
diffusion region
207
is fully depleted at a pinning voltage.
Since the transfer transistor having the transfer gate Tx is made up of a native transistor, an ion implantation process for adjusting transistor characteristics (threshold voltage and punch-through characteristics) may be omitted in the p-epi layer
202
which acts as a channel beneath a transfer gate Tx. Accordingly, the NMOS transistor (native transistor) having a negative threshold voltage may maximize the charge transfer efficiency. The N
+
diffusion region
209
(the sensing node) is made up of a heavily doped N
+
region between the transfer gate Tx and the reset gate Rx, thereby amplifying a potential of the sensing node according to an amount of transferred charges.
Since a doping concentration of the P-epi layer
202
is lower than that of the P
+
silicon substrate
201
, the p-epi layer
202
may increase a photosensitivity by increasing the depletion depth of the pinned photodiode. Also, the heavily doped P
+
silicon substrate
201
beneath the P-epi layer
202
improves the sensor array modulation transfer function by reducing the random diffusion of the photoelectric charges. The random diffusion of charges in the P
+
silicon substrate
201
leads to the possible “miscollection” of the photoelectric charges by neighboring pixels and directly results in a loss of image sharpness or a lower modulation transfer function. The shorter minority carrier lifetime and higher doping concentration of the P
+
silicon substrate
201
significantly reduces the “miscollection” of photoelectric charges since the charges are quickly recombined before diffusing to the neighboring pixels.
Since the pinned photodiode is formed on a predetermined region of the P-epi layer
202
between the field oxide layer
204
and the transfer gate Tx, it is impossible that the pinned photodiode may increase its unit area without reducing an integration degree. Also, the pinned photodiode may not increase its unit area beyond a design rule. When the design rule of the CMOS image sensor is less than 0.25 &mgr;m, the photosensitivity and resolution of the CMOS image sensor is reduced.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a method for fabricating an image sensor that may increase a unit area of a pinned photodiode with maintaining a constant integration degree, thereby increasing a photosensitivity.
In accordance with an aspect of the present invention, there is provided a method for fabricating a CMOS image sensor, comprising, the steps of (a) providing a semiconductor layer of a first conductive type; (b) exposing a portion of the semiconductor layer, thereby defining a light sensing area in which a photodiode is formed; (c) growing an epitaxial layer on the exposed semiconductor layer; (d) implanting impurities of a second conductive type into the grown epitaxial layer, thereby forming a second type diffusion layer; (e) implanting impurities of the first conductive type into the grown epitaxial layer so that a first type diffusion layer is formed in the second type diffusion layer, wherein a thickness of the first conductive diffusion layer formed is thinner than that of the second type conductive diffusion layer; and (f) patterning the grown epitaxial layer, whereby a surface area of the patterned epitaxial layer is wider than that of the exposed semiconductor layer and a PN junction is formed along a surface of the patterned epitaxial layer.
In accordance with another aspect of the present invention, there is provided a method for fabricating a CMOS image sensor, comprising, the steps of (a) providing a semiconductor layer of a first conductive type; (b) exposing a portion of the semiconductor layer, thereby defining a light sensing area in which a photodiode is formed; (c) growing an epitaxial layer on the exposed semiconductor layer; (d) implanting impurities of a second conductive type into the grown epitaxial layer, thereby forming a second type diffusion layer; (e) patterning the grown epitaxial layer; (f) forming an ion implanting mask exposing the grown epitaxial layer; and (g) implanting impurities of the first conductive type into the grown epitaxial layer so that a first type diffusion layer is formed in the second type diffusion layer, wherein a thickness of the first conductive diffusion layer formed is thinner than that of the second type conductive diffusion layer and wherein the first type diffusion layer is directly in contact with the semiconductor layer, whereby a surface area of the patterned epitaxial layer is wider than that of the exposed semiconductor layer and a PN junction is formed along a surface of the patterned epitaxial layer.
REFERENCES:
patent: 4984047 (1991-01-01), Stevens
patent: 5051797 (1991-09-01), Erhardt
patent: 5841159 (1998-11-01), Lee et al.
patent: 6023081 (2000-02-01), Dowley et al.
patent: 6026964 (2000-02-01), Hook et al.
patent: 6027955 (2000-02-01), Lee et al.
patent: 6043115 (2000-03-01), Pan
Hyundai Electronics Industries Co,. Ltd.
Le Dung Ans
Nelms David
Townsend and Townsend / and Crew LLP
LandOfFree
Method for fabricating image sensor with extended pinned... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating image sensor with extended pinned..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating image sensor with extended pinned... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2519817