Method for fabricating IGFET integrated circuits

Details Method for fabricating IGFET integrated circuits Method for fabricating IGFET integrated circuits

1979-12-28

1982-03-16

Walton, Donald L.

Metal working

Method of mechanical manufacture

Assembling or joining

29577R, 29577C, H01L 2174, H01L 2188

Patent

active

043193960

ABSTRACT:
A rapid and systematic method for performing chip layout of a random-logic IGFET circuit includes steps for arranging the device features and interconnection features corresponding to the circuit in respective positions in an array of intersecting rows and columns. The method provides layouts of device and interconnection features having a high packing density and a high degree of order and regularity to facilitate checking for layout errors.

REFERENCES:
patent: 3747200 (1973-07-01), Rutledge
patent: 3753005 (1973-08-01), Bertram et al.
patent: 3865650 (1975-02-01), Arita
patent: 4125854 (1978-11-01), McKenny
patent: 4218693 (1980-08-01), Gee et al.

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