Fishing – trapping – and vermin destroying
Patent
1995-02-16
1996-03-26
Fourson, George
Fishing, trapping, and vermin destroying
437979, 437983, 437 56, H01L 2102
Patent
active
055020097
ABSTRACT:
A method for fabricating gate oxide layers of different thicknesses on a silicon substrate. A field oxide layer is formed on a predetermined portion of the silicon substrate to define first active regions and second active regions. A first gate oxide layer is formed over the first and second active regions. A barrier layer is formed to cover a portion of the first gate oxide layer within the first active regions. The portion of the first gate oxide layer within the second active regions is then removed utilizing the barrier layer as masking. A second gate oxide layer is then formed over the second active regions.
REFERENCES:
patent: 4859619 (1989-08-01), Wu et al.
patent: 5254489 (1993-10-01), Nakata
Dutton Brian K.
Fourson George
United Microelectronics Corp.
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