Method for fabricating electrostatic discharge protecting transi

Details Method for fabricating electrostatic discharge protecting transi Method for fabricating electrostatic discharge protecting transi

1994-10-21

1996-08-13

Thomas, Tom

Fishing, trapping, and vermin destroying

437 40, H01L 2174

Patent

active

055455727

ABSTRACT:
An electrostatic discharge (ESD) protecting transistor and a method for fabricating the same, capable of consuming a high voltage or overcurrent applied to a semiconductor circuit device and thereby protecting the circuit device from the high voltage or overcurrent. The ESD protecting transistor is of an asymmetric charge coupled MOS transistor structure having a highly doped buried layer capable of dispersing a current flux, thereby removing an instant ESD impact and reducing generation of heat caused by a concentration of high current flux. Accordingly, an effect of improving the resistance characteristic to the ESD impact is provided.

REFERENCES:
patent: 4128439 (1978-12-01), Jambotkar
patent: 4605980 (1986-08-01), Hartvanft et al.
patent: 4734752 (1988-03-01), Liu et al.
patent: 5371395 (1994-12-01), Hawkins
C. G. Jambotkar, et al., IBM Tech. Discl. Bulletin, 23(11)1981,4988 "High Voltage Mosfet Structure".
S. Wolf, "Silicon Processing For The VLSI ERA", vol. II, pp. 441-446.
B. Krabbenborg, et al., J. Electrostatics, 28(1992)285 "Physics of Electro-Thermal Effects in ESD Protection Devices" Translation of JP 64-10657, furnished with previous office action.
Translation of JP 5-36909, furnished with previous office action.

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