Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Reexamination Certificate
2008-07-01
2008-07-01
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
C438S622000, C257SE23169
Reexamination Certificate
active
10905931
ABSTRACT:
A method for fabricating an electrical interconnect structure is adapted for a circuit board manufacturing process. The circuit board comprises a conductive substrate, which comprises a first conductive layer and a bump conductive layer. The bump conductive layer is patterned to form at least one bump over the first conductive layer. Then, a dielectric layer is formed over the first conductive layer and the bump. A second conductive layer is formed over the dielectric layer. At least one blind hole is formed in the second conductive layer and the dielectric layer, passing through the second conductive layer and the dielectric layer to expose the top surface of the bump. A conductive material is filled in the blind hole, and the conductive material in the blind hole and the bump constitute a conductive post.
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Lee Chang-Ming
Lee Shao-Chien
Tseng Tzyy Jang
Ghyka Alexander
Jianq Chyun IP Office
Unimicron Technology Corp.
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