Method for fabricating dynamic random access memory cells having

Details Method for fabricating dynamic random access memory cells having Method for fabricating dynamic random access memory cells having

1994-04-26

1996-03-26

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 60, 437919, H01L 2170, H01L 2700

Patent

active

055019986

ABSTRACT:
A new method for fabricating a microminiature capacitor, on a dynamic random access memory (DRAM) cell, using a single masking level was accomplished. The method involves opening the self-aligned node contact and the area for the bottom electrode of the capacitor, at the same time, using one masking level. The planarization of a low flow temperature glass (BPSG) and an etch back technique is used to define the bottom electrode of the capacitor, which is self-aligned to the etched opening. The resulting capacitor has vertical side walls on the perimeter of the capacitor plate, which increases its area without increasing the lateral area on the DRAM cell. Using one masking level for the fabrication of the capacitor, also eliminates the need to add additional space for the tolerance of a second mask.

REFERENCES:
patent: 5102820 (1992-04-01), Chiba
patent: 5126916 (1992-06-01), Tseng
patent: 5155056 (1992-10-01), Jeong-Gyoo
patent: 5185282 (1993-02-01), Lee et al.
patent: 5338700 (1994-08-01), Dennison et al.
patent: 5364811 (1994-11-01), Ajika et al.

Affiliated with

Also associated with

Rating

Method for fabricating dynamic random access memory cells having does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating dynamic random access memory cells having, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating dynamic random access memory cells having will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-915327