Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2000-11-28
2004-03-30
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
Reexamination Certificate
active
06713363
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a device, and more particularly, to a method for fabricating a capacitor of a semiconductor device.
2. Background of Related Art
With the high packing density of a DRAM, an area of a chip has been reduced and areas of a transistor and a capacitor have been also reduced. At this time, the capacitor includes a high dielectric film to increase capacitance in a small area. Ta
2
O
5
or BST(Ba
x
Sr
1−x
T
1
O) maybe used as the high dielectric film. To use the high dielectric film in the capacitor, a lower electrode resistant to oxidation and heat is required. Oxide-based materials, such as platinum(Pt), iridium(Ir), and ruthenium(Ru), may be used as the lower electrode. Among the materials, Ru or RuO
2
, which can be deposited by chemical vapor deposition and can be easily etched to form a capacitor structure, is especially used as the material for the lower electrode. During an etching process to form the capacitor structure, the lower electrode is etched to form a concave structure to the effective area of the capacitor in a given area. To form such a concave structure, Pt may be used but has a drawback in that it is more expensive than Ru during chemical vapor deposition.
A related art method for fabricating a capacitor using Ru, RuO
2
, or a metal material alloyed with Ru as a lower electrode will now be described with reference to the accompanying drawings.
FIGS. 1A
to
1
E are sectional views showing a related art method for fabricating a capacitor of a semiconductor device.
A gate oxide film and a gate electrode are sequentially formed on some region of a semiconductor substrate
10
, and source and drain regions are formed in the semiconductor substrate
10
at both sides of the gate electrode (not shown).
As shown in
FIG. 1A
an interleaving insulating film
11
is formed on the source region or the drain region to have a contact hole.
A polysilicon layer is then deposited on the interleaving insulating film
11
including the contact hole. A contact plug
12
is formed within the contact hole by polishing back the polysilicon layer.
Afterwards, a nitride film
13
is deposited on an entire surface including the contact plug
12
, and an oxide film
14
is deposited on the nitride film
13
.
As shown in
FIG. 1B
, the oxide film
14
and the nitride film
13
are sequentially etched by photolithography process to expose the contact plug
12
and the interleaving insulating film
11
adjacent to the contact plug
12
.
As shown in
FIG. 1C
, a barrier film
15
is deposited on the contact plug
12
and the interleaving insulating film
11
including the oxide film
14
and the nitride film
13
to have a thickness of about 200 A. A conductive layer
16
is then deposited on the barrier film
15
to have a thickness of about 200 A.
The conducive layer
16
is formed of Ru, RuO
2
, or a metal material alloyed with Ru. The barrier film
15
may be formed on only the contact plug
12
within the contact hole.
Afterwards, a photoresist
17
is deposited on the entire surface including the conductive layer
16
between the respective oxide films
14
. The photoresist
17
is then etched back to expose sides of the conductive layer
16
between the respective oxide films
14
and an upper portion of the conductive layer
16
on the oxide film
14
.
The conductive layer
16
on the oxide film
14
and the barrier film
15
are sequentially removed using the photoresist
17
as a mask, so that a pair of U-shaped barrier film
15
and lower electrode
16
a
are formed, as shown in
FIG. 1D
, to be isolated from another pair of U-shaped barrier film
15
and lower electrode
16
a.
As described above, cells are separated from one another by isolating the lower electrodes
16
a
from one another.
The lower electrodes
16
a
are etched by Ar+Cl
2
plasma gas.
The photoresist
17
is then removed using O
2
plasma gas.
At this time, Ru or RuO
2
of the lower electrode
16
a
reacts with O
2
gas so that a volatile gas of RuO
4
is generated. For this reason, the lower electrodes
16
a
may be damaged.
Next, as shown in
FIGS. 1A
to
1
E, the oxide film
14
and the nitride film
13
between the respective lower electrodes
16
a
are sequentially removed and a high dielectric film
18
and a conductive layer are sequentially formed on the entire surface including the lower electrodes
16
a
. The conductive layer and the high dielectric film
18
are partially removed to isolate a pair of the conductive layer and high dielectric film from a neighboring pair of the conductive layer and high dielectric film. Thus, a U-shaped capacitor which includes an upper electrode
19
, the high dielectric film
18
and the lower electrode
16
a
is completed.
The aforementioned related art method for fabricating a capacitor of a semiconductor device has several problems.
When the photoresist used as a mask to form the lower electrode of Ru or RuO
2
in a U-shape is removed by O
2
plasma gas, O
2
gas chemically reacts with the lower electrode. As a result, the lower electrode is damaged, thereby reducing process yield.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for fabricating a capacitor of a semiconductor device that substantially obviates one or more of the problems occurring in the related art.
An object of the present invention is to provide a method for fabricating a capacitor of a semiconductor device in which loss of a lower electrode is minimized so as to improve process yield.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method for fabricating a capacitor of a semiconductor device includes: forming a conductive region on a region of a semiconductor substrate; forming an interleaving insulating film having a contact hole in the conductive region; forming a contact plug within the contact hole; forming insulating film patterns on a region of the interleaving insulating film to expose the contact plug and the interleaving insulating film adjacent to the contact plug; depositing a barrier film and a first conductive layer on an entire surface including the contact plug and the insulating film patterns; forming a photoresist on an upper portion of the contact plug between the insulating film patterns, sequentially removing the first conductive layer and the barrier film on the insulating film patterns using the photoresist as a mask to form a lower electrode and a barrier film in a U-shape; removing the photoresist using a non-reactive etching method; removing the insulating film pattern; and sequentially forming a dielectric film and an upper electrode on surfaces of the lower electrode and the barrier film.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5174856 (1992-12-01), Hwang et al.
patent: 5200031 (1993-04-01), Latchford et al.
patent: 5230772 (1993-07-01), Kadomura
patent: 5780115 (1998-07-01), Park et al.
patent: 5872061 (1999-02-01), Lee et al.
patent: 6331380 (2001-12-01), Ye et al.
patent: 6372150 (2002-04-01), Wong et al.
patent: 61277129 (1986-12-01), None
LandOfFree
Method for fabricating capacitor of semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating capacitor of semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating capacitor of semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3189964