Method for fabricating capacitor of a semiconductor device

Fishing – trapping – and vermin destroying

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437 60, 437919, H01L 218242

Patent

active

055366716

ABSTRACT:
A method for fabricating a capacitor of a dynamic random access memory, capable of achieving a very high integration degree and yet obtaining a sufficient capacitance. The method includes the steps of: forming transistors on a silicon substrate such that adjacent transistors are spaced from each other; forming an insulating film over the entire exposed surface of the resulting structure; forming bit line contact holes in the resulting structure; burying a conduction material in each of the bit line contact holes, thereby forming a bit line; etching portions of the insulating film respectively remaining on the bit line thereby exposing an upper surface and side surfaces of the bit line depositing an insulating film over the bit line to insulate the bit line from a conduction layer to be formed for a storage electrode over the bit line; forming a contact hole for the storage electrode in the resulting structure; forming the storage electrode electrically connected to each corresponding one of the transistors and overlapped with an upper surface of the bit line; and forming a dielectric film and a plate electrode over the storage electrode.

REFERENCES:
patent: 5143861 (1992-09-01), Turner
patent: 5346844 (1994-09-01), Cho et al.
patent: 5364809 (1994-11-01), Kwon et al.
patent: 5364811 (1994-09-01), Ajiica et al.

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