Method for fabricating bipolar semiconductor devices

Fishing – trapping – and vermin destroying

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148DIG10, H01L 21265, H01L 21328

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active

051167700

ABSTRACT:
A method for fabricating a bipolar or field effect-type integrated circuit transistor is provided in which non-cyrstalline semiconductor films and semiconductive regions formed in a single crystal semiconductor substrate and containing high concentrations of impurities are efficiently connected with improved electric characteristics while suppressing the influence of an increase in connection resistance caused by growth of a natural oxide film. Moreover, when a first non-crystalline semiconductor film is removed from a dielectric oxide film serving as a field film and a second non-crystalline semiconductor film is formed as a ribbon-shaped pattern on the exposed field film, a resistor of high accuracy can be formed. An interconnection system having resistors of a high accuracy and a fine size is also disclosed.

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patent: 4829015 (1989-05-01), Schaber et al.
patent: 4866001 (1989-09-01), Pickett et al.
Alcorn, G., "Polysilicon Resistors Compatible With Bipolar Integrated Circuits and Method of Manufacture", IBM Technical Disclosure Bulletin vol. 25, No. 5, Oct. 1982.
Ning, T., "Polysilicon Resistor Process for Bipolar and MOS Applications", IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun. 1980.
Mayer, J. W., Ion Implantation in Semiconductors: Silicon and Germanium, Academic Press Inc. .COPYRGT.1970, pp. 18-21.
"A High Speed Bipolar LSI Process Using Self-Aligned Double Diffusion Polysilicon Technology" by K. Kikuchi et al; 1986 IEEE pp. 420-423.

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