Method for fabricating attached capacitor cells in a semiconduct

Details Method for fabricating attached capacitor cells in a semiconduct Method for fabricating attached capacitor cells in a semiconduct

1995-03-20

1996-02-20

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 60, 437915, 437919, H01L 2170, H01L 2700

Patent

active

054928516

ABSTRACT:
A method for fabricating a semiconductor device, capable of simplifying the fabrication, increasing the effective surface area of a charge storage electrode on a limited area, and thereby achieving the fabrication of a highly integrated semiconductor device. The method includes the steps of forming a bulk metal oxide silicon field effect transistor having a first element isolation layer, a first gate and first source and drain on a semiconductor substrate, sequentially forming an insulating layer, a planarizing layer, a capacitor and a first bit line electrode layer being in contact with the first source and drain over the bulk transistor, forming a planarizing layer over the entire exposed surface of the resulting structure and then a semiconductor layer for a substrate of a thin film transistor to be formed, forming a thin film metal oxide silicon field effect transistor having a second gate and second source and drain on the semiconductor layer, and forming a second bit line electrode layer on the resulting structure such that the second bit line electrode layer is in contact with the first bit line electrode layer as well as the second source and drain.

REFERENCES:
patent: 5122476 (1992-06-01), Fazan et al.
patent: 5296402 (1994-03-01), Ryou

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