Method for fabricating and identifying integrated circuits...

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S189020

Reexamination Certificate

active

06947305

ABSTRACT:
Two types of topologically different three-dimensional integrated circuits (for example a 4-layer three-dimensional memory array and an 8-layer three-dimensional memory array) are fabricated from a single set of photo-lithographic masks. In one example, masks 1-5 are used along with other masks to create the first four levels of memory cells in both a 4-layer memory array and an 8-layer memory array. The 8-layer memory array is completed with masks used to form the top four layers of the array. An integrated circuit identification circuit generates an appropriate circuit identification signal for both types of integrated circuits by sensing whether a conductive path across some or all of the device levels of the integrated circuit is continuous, and then by selecting the appropriate circuit identification signal.

REFERENCES:
patent: 4646266 (1987-02-01), Ovshinsky et al.
patent: 5745407 (1998-04-01), Levy et al.
patent: 5835396 (1998-11-01), Zhang
patent: 6034882 (2000-03-01), Johnson et al.
patent: 6185122 (2001-02-01), Johnson et al.
patent: 6208545 (2001-03-01), Leedy
patent: 6236587 (2001-05-01), Gudesen et al.
patent: WO 99/14763 (1999-03-01), None
“Exotic memories, diverse approaches,” EDN Asia, Sep. 2001, pp. 22-33.
MAPLD 99, “Laser-formed Vertical Metallic Link and Potential Implementation in Digital Logic Integration,” Zhang et al., 19 pages (1999).
Search History for U.S. Appl. No. 10/068,195, 2 pages (May 12, 2003).

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