Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-03-23
2002-10-15
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S712000, C438S713000
Reexamination Certificate
active
06465360
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 89102589, filed Feb. 16, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device. More particularly, the present invention relates to a method for fabricating an opening with small critical dimension.
2. Description of the Related Art
In the fabrication of semiconductor devices, increasing device density on a given die area provides significant advantages such as speed and power efficiency. Openings, such as vias and contacts with sizes as small as about 0.15 to 0.2 micron, are frequently formed by photolithographic patterning of the insulating layer.
FIGS. 1A
to
1
C illustrate the forming of a via or contact opening using photolithography technique according to the conventional practice.
As shown in
FIG. 1A
, a wafer substrate
100
with a layer of insulation material
102
is provided. A photoresist layer
104
, for example, a negative photoresist, is coated on the surface of the insulation material
102
.
Referring to
FIG. 1B
, a mask layer
106
is precisely aligned and disposed over the substrate
100
. Thereafter, the photoresist layer
104
is exposed to light or other radiation sources through the mask layer
106
and then is developed.
Continuing to
FIG. 1C
, the exposed portion of the insulation material
102
and the photoresist layer
104
are removed, forming a via or contact opening
108
in the insulation material
102
.
The photolithography technique can produce very fine resolution on a substrate; however, as the dimensions of a semiconductor device are gradually reduced, the control of the critical dimension in a photolithography process is hindered by the limitations of light resolution and the depth of focus (DOF). Due to the manufacturing constraints associated with the technologies capable of producing extremely high resolution, the development of dies having greater device density and smaller device features is seriously hampered.
Presently, deep-UV wavelengths are used for fine-resolution photolithography. Switching to a higher frequency would theoretically allow a greater density and smaller device features, but it would not be very cost effective due to the need to develop new equipments, fabrication techniques, or photoresists appropriates for the shorter wavelengths.
Other approaches to reduce the critical dimension of a device usually requires the employment of a more complicated mask, for example, PSM, and to conduct a special exposure technique, for example, an off-axial illumination. The purpose of reducing the critical dimension can be achieved with the above approaches, the manufacturing cost of an integrated circuit, however, is also increased significantly. Furthermore, adjacent areas of the constructive interference are often seen as a single large region, and are not resolved in some cases.
The E-beam exposure systems and the X-Ray systems are two other options for forming openings with a width of about 0.1 micron or less. Unfortunately, the E-beam and the X-ray systems are still in the research stage. Furthermore, using the E-beam and the X-ray systems are also not very cost effective.
SUMMARY OF THE INVENTION
Based on the foregoing, the present invention provides a fabrication method for an ultra-small opening, for example, sub-0.1 micron, using the existing and less expensive technology.
As embodied and broadly described herein, the present invention provides a method for producing an opening with small critical dimension, for example, sub-0.1 micron, wherein a first photoresist layer is coated on a semiconductor substrate. A mask layer with a small opening pattern is then accurately aligned with the substrate. After this, the first photoresist layer is exposed to light through the mask layer and is then developed. After removing the unpolymerized portion on the first photoresist layer, an opening is formed in the first photoresist layer. A plasma treatment process is then conducted on the surface of the remaining first photoresist layer, forming free radicals and bridging bonds on the surface of the first photoresist layer. A thin layer of a second photoresist is further conformally coated on the active surface of the first photoresist layer, resulting with an ultra-small opening.
Accordingly, the present invention uses well established processes to provide an opening smaller in size, for example, sub-0.1 micron. By performing this surface treatment process on the photoreist layer, an ultra-small opening can be formed without the use of a light source with a shorter wavelength. Furthermore, cheaper methods employing a light source with longer wavelengths can be used without the loss of resolution. The present invention thereby increases the performance of the products by scaling the existing technology in a controllable fashion.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5468595 (1995-11-01), Liversay
patent: 5635337 (1997-06-01), Bartha et al.
patent: 5714037 (1998-02-01), Puntambekar et al.
patent: 5858620 (1999-01-01), Ishibashi et al.
patent: 5863707 (1999-01-01), Lin
patent: 5877076 (1999-03-01), Dai
patent: 6162591 (2000-12-01), Gao et al.
Lee Tzung-Han
Lin Kun-Chi
Yang Jin-Sheng
J.C. Patents
United Microelectronics Corp.
Utech Benjamin L.
Vinh Lan
LandOfFree
Method for fabricating an ultra small opening does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating an ultra small opening, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating an ultra small opening will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2988680