Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With non-planar semiconductor surface
Reexamination Certificate
2006-01-10
2006-01-10
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With non-planar semiconductor surface
C257S592000
Reexamination Certificate
active
06984872
ABSTRACT:
The present invention relates to a bipolar transistor of NPN type implemented in an epitaxial layer within a window defined in a thick oxide layer, including an opening formed substantially at the center of the window, this opening penetrating into the epitaxial layer down to a depth of at least the order of magnitude of the thick oxide layer, an N-type doped region at the bottom of the opening, a first P-type doped region at the bottom of the opening, a second lightly-doped P-type region on the sides of the opening, and a third highly-doped P-type region in the vicinity of the upper part of the opening, the three P-type regions being contiguous and forming the base of the transistor.
REFERENCES:
patent: 4215418 (1980-07-01), Muramatsu
patent: 4232439 (1980-11-01), Shibata
patent: 4276543 (1981-06-01), Miller et al.
patent: 4752589 (1988-06-01), Schaber
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 4980302 (1990-12-01), Shimizu
patent: 5008207 (1991-04-01), Blouse et al.
patent: 5015594 (1991-05-01), Chu et al.
patent: 5017990 (1991-05-01), Chen et al.
patent: 5045484 (1991-09-01), Yamada et al.
patent: 5100815 (1992-03-01), Tsubone et al.
patent: 5137840 (1992-08-01), Desilets et al.
patent: 5192992 (1993-03-01), Kim et al.
patent: 5238850 (1993-08-01), Matsunaga et al.
patent: 5321650 (1994-06-01), Kikuchi et al.
patent: 5416031 (1995-05-01), Miwa
patent: 5429959 (1995-07-01), Smayling
patent: 5439832 (1995-08-01), Nakamura
patent: 5471085 (1995-11-01), Ishigaki et al.
patent: 5478760 (1995-12-01), Yang
patent: 5488003 (1996-01-01), Chambers et al.
patent: 5512497 (1996-04-01), Ikeda et al.
patent: 5512785 (1996-04-01), Haver et al.
patent: 5705410 (1998-01-01), Guegan
patent: 5753957 (1998-05-01), Watabe
patent: 5773349 (1998-06-01), Ham
patent: 5880000 (1999-03-01), Gris
patent: 5953600 (1999-09-01), Gris
patent: 6156616 (2000-12-01), Gris
patent: 2004/0164378 (2004-08-01), Gris
patent: A-0 495 329 (1992-07-01), None
French Search Report from French Patent Application 96 14411, filed Nov. 19, 1996.
French Search Report from French Patent Application 96 14412, filed Nov. 19, 1996.
Jorgenson Lisa K.
Morris James H.
Prenty Mark V.
SGS-Thomson Microelectronics S.A.
Wolf Greenfield & Sacks P.C.
LandOfFree
Method for fabricating an NPN transistor in a BICMOS technology does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating an NPN transistor in a BICMOS technology, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating an NPN transistor in a BICMOS technology will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3526467